Schematic Diagram
7-12
Samsung Electronics
S
W
w
o
l
a
t
a
d
h
c
t
a
l
o
t
#
R
W
f
o
e
g
d
e
g
n
i
s
i
r
e
s
U
a
t
a
d
h
c
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#
R
W
f
o
e
g
d
e
g
n
il
l
a
f
e
s
U
-
1
A
T
U
O
X
T
K
C
S
-
3
A
T
U
O
X
T
F
7
/
E
7
x
0
=
s
s
e
r
d
d
a
e
v
a
l
S
C
2
I
-
3
A
T
U
O
X
T
A
7
1
0
0
0
-
2
6
P
B
>
-
-
-
s
s
e
r
d
d
a
h
c
t
a
l
o
t
E
L
A
e
s
U
N
I
P
O
T
R
A
E
N
K
N
I
S
T
A
E
H
*
*
*
+
K
L
C
A
T
U
O
X
T
W
O
L
S
W
n
o
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t
p
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g
n
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t
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l
a
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A
R
T
S
T
O
O
B
s
s
e
r
d
d
a
h
c
t
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t
#
D
R
&
#
R
W
f
o
s
e
g
d
e
g
n
il
l
a
f
e
s
U
D
7
/
C
7
x
0
=
s
s
e
r
d
d
a
e
v
a
l
S
C
2
I
w
o
l
h
g
i
h
+
1
A
T
U
O
X
T
I2C Chip Debug
3
2
1
1
R
,
1
2
1
1
R
,
0
2
1
1
R
:
L
E
D
*
-
0
A
T
U
O
X
T
-
2
A
T
U
O
X
T
H
G
I
H
+
2
A
T
U
O
X
T
0
D
S
e
m
a
N
n
i
P
+
0
A
T
U
O
X
T
-
K
L
C
A
T
U
O
X
T
K
C
S
0
D
S
5
0
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
1
1
-
E
T
-
B
6
.
5
Z
L
R
9
0
1
1
D
m
h
o
K
7
.
4
1
2
3
4
5
9
1
1
1
R
*
1
0
1
1
N
C
F
n
0
0
1
7
2
1
1
C
F
n
0
0
1
0
3
1
1
C
2
3
1
1
C
F
n
0
0
1
m
h
o
0
9
0
1
1
R
6
2
1
1
C
F
n
0
0
1
m
h
o
K
7
.
4
4
2
1
1
R
F
n
0
1
R1104
7
0
1
1
C
6
4
1
1
R
10ohm
m
h
o
3
3
m
h
o
0
7
1
1
1
R
m
h
o
3
3
5
1
1
1
R
10ohm
R1108
m
h
o
0
8
3
1
1
R
4
3
1
1
C
F
n
0
0
1
m
h
o
K
7
.
4
D
1
2
1
1
R
5
2
1
1
C
F
n
0
0
1
F
n
0
0
1
7
0
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
2
2
1
1
C
8
1
1
1
C
F
n
0
0
1
1
1
1
1
C
V
6
1
F
u
2
2
W
0
1
/
1
m
h
o
0
2
3
1
1
R
6
0
1
1
C
F
n
0
1
F
n
0
0
1
0
2
1
1
C
3
1
1
1
C
F
n
0
0
1
V
5
B
4
0
1
1
C
F
n
7
.
4
2
_
V
3
.
3
B
1/10W
0ohm
R1125
4
1
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
5
4
1
1
R
m
h
o
0
1
1
-
E
T
-
B
6
.
5
Z
L
R
1
1
1
1
D
F
n
0
0
1
9
2
1
1
C
R1126
0ohm
1/10W
F
n
0
0
1
3
3
1
1
C
1
1
-
E
T
-
B
6
.
5
Z
L
R
5
1
1
1
D
6
3
1
1
R
D
3
2
1
1
R
m
h
o
K
7
.
4
m
h
o
0
0
1
1
1
R
m
h
o
0
R1101
10ohm
m
h
o
K
0
1
D
6
1
1
1
R
3
1
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
99
AD6
F
n
0
0
1
5
3
1
1
C
91
VDDH
92
VSSH
93
AD0
94
AD1
95
AD2
96
AD3
97
AD4
98
AD5
84
ADDR1
85
ADDR2
86
ADDR3
87
ADDR4
88
ADDR5
89
ADDR6
9
2
S
F
90
ADDR7
77
VSSH
78
VDDC
79
VSSC
8
1
S
B
V
C
80
VDDC
81
VSSC
82
HS
83
ADDR0
7
1
C
D
A
_
3
D
D
V
A
70
DPA_3
71
DPA_2
72
DPA_1
73
DPA_0
74
DPA_HS
75
DPA_VS
76
VDDH
2
6
1
1
_
A
P
D
3
6
0
1
_
A
P
D
4
6
9
_
A
P
D
65
DPA_8
66
DPA_7
67
DPA_6
68
DPA_5
69
DPA_4
5
5
C
D
D
V
6
5
C
S
S
V
7
5
5
1
_
A
P
D
8
5
4
1
_
A
P
D
9
5
3
1
_
A
P
D
6
S
S
A
_
G
B
_
S
S
V
A
0
6
2
1
_
A
P
D
1
6
K
L
C
_
A
P
D
8
4
K
C
S
9
4
S
W
5
S
S
A
_
G
B
_
3
D
D
V
A
0
5
0
D
S
1
5
H
D
D
V
2
5
H
S
S
V
3
5
H
D
D
V
4
5
H
S
S
V
0
4
C
S
S
V
S
H
_
N
I
A
1
4
2
4
S
V
_
N
I
A
3
4
V
5
R
W
P
4
4
L
C
S
D
5
4
A
D
S
D
6
4
T
D
C
S
7
4
K
L
C
O
I
D
U
A
3
3
3
C
D
A
_
S
S
V
A
4
3
2
C
D
A
_
3
D
D
V
A
5
3
1
B
_
B
P
6
3
2
B
_
B
P
7
3
3
B
_
B
P
8
3
B
_
C
P
9
3
C
D
D
V
4
F
U
B
T
U
O
_
3
D
D
V
A
6
2
2
C
D
A
_
S
S
V
A
1
R
_
R
P
7
2
8
2
2
R
_
R
P
9
2
3
R
_
R
P
3
F
U
B
T
U
O
_
S
S
V
A
0
3
4
_
C
P
1
3
C
2
3
3
C
D
A
_
D
D
V
A
5
2
2
C
D
A
_
D
D
V
A
XTALO
250
251
PAVSS1
252
MLF1
253
PAVDD1
254
PAVSS2
255
PLF2
256
PAVDD2
242
VSSC
243
DGND
244
REGVCC
245
AVDDLLPLL
246
AVSSLLPLL
247
AVDDAPLL
248
AVSSAPLL
249
XTALI
235
RX1+
AGND
236
237
AVCC
238
RX2-
239
RX2+
4
2
2
_
N
F
E
R
V
240
AGND
241
VDDC
228
AGND
AVCC
229
3
2
2
_
P
F
E
R
V
230
RX0-
231
RX0+
232
AGND
233
AVCC
234
RX1-
220
BA0
221
BA1
222
PGND
223
PVCC
224
ANTSTO
225
AVCC
226
RXC-
227
RXC+
213
CS1#
RAS#
214
215
VDDM
216
VSSM
217
CAS#
218
WE#
219
CLKE
2
2
G
_
C
P
206
MA3
207
MA2
208
VDDC
209
VSSC
1
2
3
G
_
Y
210
MA1
211
MA0
212
CS0#
2
1
T
U
O
_
S
B
V
C
0
2
2
G
_
Y
200
MA7
201
VDDM
202
VSSM
203
MA6
204
MA5
205
MA4
2
9
1
C
S
S
V
193
VSSR
194
MVREF
195
VDDR
196
MA11
197
MA10
198
MA9
199
MA8
5
8
1
8
2
D
M
6
8
1
9
2
D
M
7
8
1
0
3
D
M
8
8
1
1
3
D
M
9
8
1
0
K
L
C
M
9
1
1
G
_
Y
0
9
1
#
O
K
L
C
M
1
9
1
C
D
D
V
8
7
1
5
2
D
M
9
7
1
6
2
D
M
8
1
4
C
D
A
_
S
S
V
A
0
8
1
7
2
D
M
1
8
1
3
M
Q
D
2
8
1
M
D
D
V
3
8
1
M
S
S
V
4
8
1
3
S
Q
D
0
7
1
2
S
Q
D
1
7
1
0
2
D
M
1
2
D
M
2
7
1
3
7
1
2
2
D
M
4
7
1
3
2
D
M
5
7
1
C
D
D
V
6
7
1
C
S
S
V
7
7
1
4
2
D
M
3
6
1
6
1
D
M
4
6
1
7
1
D
M
8
1
D
M
5
6
1
6
6
1
9
1
D
M
7
6
1
2
M
Q
D
8
6
1
M
D
D
V
9
6
1
M
S
S
V
7
1
4
C
D
A
_
D
D
V
A
6
5
1
1
S
Q
D
7
5
1
2
1
D
M
8
5
1
3
1
D
M
9
5
1
4
1
D
M
6
1
1
C
D
A
_
D
D
V
A
0
6
1
5
1
D
M
1
6
1
C
D
D
V
2
6
1
C
S
S
V
9
4
1
8
D
M
5
1
1
C
D
A
_
S
S
V
A
0
5
1
9
D
M
1
5
1
0
1
D
M
2
5
1
1
1
D
M
3
5
1
1
M
Q
D
4
5
1
M
D
D
V
5
5
1
M
S
S
V
1
4
1
M
S
S
V
2
4
1
0
S
Q
D
4
D
M
3
4
1
4
4
1
5
D
M
5
4
1
6
D
M
6
4
1
7
D
M
7
4
1
C
D
D
V
8
4
1
C
S
S
V
4
3
1
D
D
D
V
_
S
D
V
L
5
3
1
0
D
M
6
3
1
1
D
M
7
3
1
2
D
M
8
3
1
3
D
M
9
3
1
0
M
Q
D
4
1
1
_
N
F
E
R
V
0
4
1
M
D
D
V
127
TA1P
128
TA1M
9
2
1
O
S
S
V
_
S
D
V
L
3
1
1
_
P
F
E
R
V
0
3
1
O
D
D
V
_
S
D
V
L
1
3
1
A
D
D
V
_
S
D
V
L
2
3
1
A
S
S
V
_
S
D
V
L
3
3
1
D
S
S
V
_
S
D
V
L
2
1
1
B
F
120
TD1M
TCLK1P
121
122
TCLK1M
123
TC1P
124
TC1M
125
TB1P
126
TB1M
112
V5SF
113
LVDS_VSSP
114
LVDS_VDDP
115
LVDS_VSSO
116
LVDS_VDDO
117
TE1P
118
TE1M
119
TD1P
105
SDA
106
SCL
VDDC
107
108
VSSC
109
INTN
1
1
2
B
F
110
RESET
111
TESTMODE
1
2
T
U
O
_
S
B
V
C
0
1
1
S
F
100
AD7
101
RD#
102
WR#
103
ALE
104
CPU_CS
m
h
o
0
6
5
2
7
-
6
5
X
P
-
P
V
S
1
0
1
1
C
I
9
3
1
1
R
2
2
1
1
R
m
h
o
K
7
.
4
3
0
1
1
C
F
n
7
.
4
R1128
4.7Kohm
1/10W
1
1/10W
0ohm
R1127
4
4
1
1
R
TP1101
m
h
o
0
8
0
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
8
2
1
1
C
F
n
0
0
1
m
h
o
0
2
4
1
1
R
m
h
o
3
3
3
1
1
1
R
D
8
1
1
1
R
m
h
o
K
0
1
1
4
1
1
R
m
h
o
0
3
2
1
1
C
F
n
0
0
1
D
0
2
1
1
R
4
2
1
1
C
F
n
0
0
1
m
h
o
0
m
h
o
K
7
.
4
F
n
0
0
1
4
1
1
1
C
7
3
1
1
R
9
1
1
1
C
6
0
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
F
n
0
0
1
10ohm
R1103
R1105
10ohm
5
1
1
1
C
F
n
0
0
1
8
0
1
1
C
1
1
-
E
T
-
B
6
.
5
Z
L
R
4
0
1
1
D
F
n
0
1
F
n
0
0
1
6
1
1
1
C
D
1
3
1
1
C
F
n
0
0
1
1
1
-
E
T
-
B
6
.
5
Z
L
R
2
0
1
1
D
2
1
1
1
C
2
_
V
3
.
3
B
8
.
1
D
V
_
X
P
D
7
1
1
1
C
F
n
0
0
1
F
n
0
0
1
2
1
1
1
D
1
1
-
E
T
-
B
6
.
5
Z
L
R
R1102
10ohm
1
2
1
1
C
3
4
1
1
R
m
h
o
0
F
n
0
0
1
9
0
1
1
C
F
n
0
1
1
1
-
E
T
-
B
6
.
5
Z
L
R
6
1
1
1
D
10ohm
R1107
m
h
o
0
0
4
1
1
R
1
1
-
E
T
-
B
6
.
5
Z
L
R
0
1
1
1
D
4
1
1
1
R
m
h
o
3
3
R1106
10ohm
5
3
1
1
R
m
h
o
0
6
3
1
1
C
F
n
0
0
1
V
5
2
2
1
1
1
R
m
h
o
K
0
1
3
3
1
1
R
m
h
o
0
W
0
1
/
1
V
6
1
F
n
0
0
1
2
0
1
1
C
F
p
8
1
8
3
1
1
C
28.322MHz
7
3
1
1
C
F
p
8
1
X1101
E
2
28
32
2
5
5
7
1
1
-
E
T
-
B
6
.
5
Z
L
R
3
0
1
1
D
R1129
1
1
-
E
T
-
B
6
.
5
Z
L
R
1
0
1
1
D
1/10W
1Kohm
R1130
1/10W
4.7Kohm
m
h
o
0
1
1
1
1
R
0
1
1
1
C
F
n
0
1
V
3
.
3
_
V
T
_
A
D
S
V
3
.
3
_
V
T
_
L
C
S
)
0
(
O
_
V
L
)
1
(
O
_
V
L
)
2
(
O
_
V
L
)
3
(
O
_
V
L
)
4
(
O
_
V
L
)
5
(
O
_
V
L
)
6
(
O
_
V
L
)
7
(
O
_
V
L
)
8
(
O
_
V
L
)
9
(
O
_
V
L
)
0
1
(
O
_
V
L
)
1
1
(
O
_
V
L
RESET_SVP
D
D
V
_
S
D
V
L
_
X
P
)
0
(
1
D
M
_
R
D
D
S
S
V
_
S
D
V
L
_
X
P
nWE
nOE
SVP_CD(7)
)
1
1
(
1
D
M
_
R
D
D
)
0
1
(
1
D
M
_
R
D
D
)
9
(
1
D
M
_
R
D
D
1
C
D
A
_
S
S
V
A
_
X
P
)
8
(
1
D
M
_
R
D
D
)
7
(
1
D
M
_
R
D
D
)
6
(
1
D
M
_
R
D
D
)
5
(
1
D
M
_
R
D
D
)
4
(
1
D
M
_
R
D
D
)
0
(
1
S
Q
D
_
R
D
D
Q
M
D
D
V
)
0
(
M
Q
D
_
R
D
D
)
3
(
1
D
M
_
R
D
D
)
2
(
1
D
M
_
R
D
D
)
1
(
1
D
M
_
R
D
D
)
1
2
(
1
D
M
_
R
D
D
)
0
2
(
1
D
M
_
R
D
D
)
2
(
1
S
Q
D
_
R
D
D
4
C
D
A
_
D
D
V
A
_
X
P
)
2
(
M
Q
D
_
R
D
D
)
9
1
(
1
D
M
_
R
D
D
)
8
1
(
1
D
M
_
R
D
D
)
7
1
(
1
D
M
_
R
D
D
)
6
1
(
1
D
M
_
R
D
D
)
5
1
(
1
D
M
_
R
D
D
1
C
D
A
_
D
D
V
A
_
X
P
)
4
1
(
1
D
M
_
R
D
D
)
3
1
(
1
D
M
_
R
D
D
)
2
1
(
1
D
M
_
R
D
D
)
1
(
1
S
Q
D
_
R
D
D
)
1
(
M
Q
D
_
R
D
D
DDR_MA(11)
Q
M
D
D
V
#
0
K
L
C
M
0
K
L
C
M
)
1
3
(
1
D
M
_
R
D
D
)
0
3
(
1
D
M
_
R
D
D
)
9
2
(
1
D
M
_
R
D
D
)
8
2
(
1
D
M
_
R
D
D
)
3
(
1
S
Q
D
_
R
D
D
)
3
(
M
Q
D
_
R
D
D
)
7
2
(
1
D
M
_
R
D
D
4
C
D
A
_
S
S
V
A
_
X
P
)
6
2
(
1
D
M
_
R
D
D
)
5
2
(
1
D
M
_
R
D
D
)
4
2
(
1
D
M
_
R
D
D
)
3
2
(
1
D
M
_
R
D
D
)
2
2
(
1
D
M
_
R
D
D
WE#
CAS#
RAS#
CS0#
DDR_MA(0)
DDR_MA(1)
DDR_MA(2)
DDR_MA(3)
DDR_MA(4)
DDR_MA(5)
DDR_MA(6)
DDR_MA(7)
DDR_MA(8)
DDR_MA(9)
DDR_MA(10)
PX_AVDDLLPLL
PX_REGVCC
PX_DGND
PX_AGND
PX_AVCC
PX_PVCC
PX_PGND
BA1
BA0
CLKE
2
C
D
A
_
3
D
D
V
A
_
X
P
3
C
D
A
_
S
S
V
A
_
X
P
3
C
D
A
_
D
D
V
A
_
X
P
F
U
B
T
U
O
_
S
S
V
A
_
X
P
2
C
D
A
_
S
S
V
A
_
X
P
PX_PAVDD2
PX_PLF2
PX_PAVSS2
PX_PAVDD1
PX_MLF1
PX_PAVSS1
2
C
D
A
_
D
D
V
A
_
X
P
PX_AVSSAPLL
PX_AVDDAPLL
PX_AVSSLLPLL
SVP_Y(4)
SVP_Y(5)
SVP_Y(6)
SVP_Y(7)
)
0
(
C
_
P
V
S
)
1
(
C
_
P
V
S
)
2
(
C
_
P
V
S
)
3
(
C
_
P
V
S
K
L
C
_
P
V
S
)
4
(
C
_
P
V
S
S
S
A
_
G
B
_
S
S
V
A
_
X
P
)
5
(
C
_
P
V
S
)
6
(
C
_
P
V
S
)
7
(
C
_
P
V
S
V
3
.
3
B
_
H
D
D
V
S
S
A
_
G
B
_
3
D
D
V
A
_
X
P
A
D
S
_
C
D
D
_
I
M
D
H
L
C
S
_
C
D
D
_
I
M
D
H
F
U
B
T
U
O
_
3
D
D
V
A
_
X
P
)
1
1
:
0
(
O
_
V
L
)
1
3
:
0
(
1
D
M
_
R
D
D
SVP_CD(6)
SVP_CD(5)
SVP_CD(4)
SVP_CD(3)
SVP_CD(2)
SVP_CD(1)
SVP_CD(0)
SVP_AD(7)
SVP_AD(6)
SVP_AD(5)
SVP_AD(4)
SVP_AD(3)
SVP_AD(2)
SVP_AD(1)
SVP_AD(0)
SVP_VS
SVP_HS
SVP_Y(0)
SVP_Y(1)
SVP_Y(2)
SVP_Y(3)
1
C
D
A
_
3
D
D
V
A
_
X
P
S
B
V
C
_
2
O
E
D
I
V
C
_
1
S
H
V
S
D
E
R
_
C
P
R
P
_
2
P
M
O
C
Y
_
1
S
H
V
S
E
U
L
B
_
C
P
B
P
_
2
P
M
O
C
S
B
V
C
_
1
O
E
D
I
V
Y
_
2
S
H
V
S
N
I
A
M
_
S
B
V
C
_
R
E
N
U
T
C
_
2
S
H
V
S
nSMC_CS3
1
C
D
A
_
S
S
V
A
_
X
P
2
C
D
A
_
S
S
V
A
_
X
P
N
E
E
R
G
_
C
P
P
V
S
_
S
H
_
C
P
P
V
S
_
S
V
_
C
P
Y
_
2
P
M
O
C
SVP_Y(0:7)
)
7
:
0
(
C
_
P
V
S
SVP_AD(0:7)
SVP_CD(0:7)
K
L
C
R
L
_
I
M
D
H
K
L
C
S
_
I
M
D
H
O
D
S
_
I
M
D
H
K
L
C
M
_
I
M
D
H
F
E
R
V
M
)
3
:
0
(
M
Q
D
_
R
D
D
)
1
1
:
0
(
A
M
_
R
D
D
SVP_INT
HDMI_RX0-
HDMI_RX2-
H
H
HDMI_RX1-
H
HDMI_RXCLK-
HDM
Y
_
1
P
M
O
C
B
P
_
1
P
M
O
C
R
P
_
1
P
M
O
C
This Document can not be used without Samsung’s authorization.
7-2-10 SVP-PX_MAIN
Power
Summary of Contents for PL-42Q91HDP
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Page 15: ...2 6 Samsung Electronics MEMO ...
Page 62: ...4 35 Samsung Electronics MEMO ...
Page 73: ...6 8 Samsung Electronics MEMO ...
Page 75: ...7 2 Samsung Electronics MEMO ...