SanDisk SDMB-16 Product Manual Download

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MultiMediaCard Product Manual

•

Stream read

There is a stream oriented data transfer controlled
by READ_DAT_UNTIL_STOP  (CMD11).  This
command  instructs  the  card to send  its  payload,
starting at a specified  address, until the  host
sends a STOP_TRANSMISSION

command

(CMD12). Note that the host stop command has
an execution delay due to the serial command
transmission. The data transfer stops after the end
bit of the STOP_TRANSMISSION command.

If the end of the  memory range is reached  while
sending  data  and no stop command  has yet been
sent by the host, the content of the  further
transferred payload is undefined.

The maximum clock frequency for stream read
operation is given by the following formula:

max. speed = min (TRAN_SPEED, (8*2

READ_BL_LEN

– NSAC)/TAAC)

If the host attempts to use a higher  frequency, the
card may not be able to sustain data  transfer.
Should  this happen, the card  will  set the
UNDERRUN error bit in the  status register,  abort
the  transmission and wait in the data state for a
stop or a new read command.

•

Block read

Block read is similar to stream read, except the
basic unit of data transfer is a block whose
maximum

size is defined in the CSD

(READ_BL_LEN). Smaller blocks whose starting
and ending address are wholly contained within
one

physical

block

(as defined by

READ_BL_LEN) may also be transmitted. Unlike
stream read, a CRC is appended to the end of each
block ensuring data transfer integrity. CMD17
(READ_SINGLE_BLOCK) starts a block read and
after a complete transfer the

card goes

back to Transfer State.

CMD18

(READ_MULTIPLE_BLOCK) starts a transfer of
several consecutive blocks. Blocks will be
continuously transferred until a stop command is
issued.

If the host uses partial  blocks whose accumulated
length is not block aligned, the card  will, at the
beginning of the first misaligned block, detect  a
block

misalignment error, set the

ADDRESS_ERROR error bit in the status register,
abort transmission and wait (in the

Data State

) for

a stop command.

All upper case names are defined in the CSD.

5.3.2

Data Write Format

The data transfer format is similar to the data
read format. For block oriented write data
transfer, the CRC  check bits are  added to each
data  block. The card performs a CRC check for
each  such  received data block prior to a write
operation. (The polynomial is the  same  one  used
for a read operation.) By  this  mechanism,  writing
of erroneously transferred data can be prevented.

•

Stream write

Stream write (CMD20) means  that data is
transferred  beginning from the starting address
until the host issues a stop command.  The  data
stream  must  start  and stop on block boundaries.
Since  the  amount of data to be transferred is not
determined in advance, CRC can not be used. If  the
end of the memory range is  reached while sending
data  and no stop command  has  been  sent by the
host, the content of the further transferred
payload is discarded.

The maximum clock frequency for stream write
operation is given by the following formula:

max. speed = min (TRAN_SPEED, (8*2

WRITE_BL_LEN

– NSAC)/(TAAC*R2W_FACTOR))

If the host attempts to use a higher  frequency, the
card may not be able to process the data and will
stop programming, set  the OVERRUN error bit in
the status register, and while  ignoring all  further
data transfer, wait (in the

Receive-Data-State

) for a

stop  command.  The write operation will  also be
aborted if  the host tries to write over a write
protected  area. In this  case, however, the card
will set the WP_VIOLATION bit.

•

Block Write

Block write (CMD24 - 27) means that  one or more
blocks of data are transferred from the host to the
card  with a CRC  appended to the  end of each
block by the host. If the CRC fails,  the  card will
indicate the failure on the DAT line (see below);
the transferred data  will be discarded  and not
written  and  all  further transmitted blocks (in
multiple block write mode) will be ignored.

If the host uses partial blocks whose accumulated
length is not block aligned, the card will detect
the

block

misalignment

error and abort

programming before the beginning of the first
misaligned block. The card will set the