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1
3
2
OUT
GND
V
CC
IC900 BA033FP(REGULATER)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
C1
C4
I/O4
I/O3
O/I4 O/I3
I/O1
O/I1 O/I2 I/O2
V
SS
C2
C3
IC BLOCK DIAGRAM & DESCRIPTION
IC101BU4066BCF(ANALOG SW)(DVD)
IC550 LE28C1001ATS(Flash Memory)
WE
OE
CE
A11
A9
A8
A13
A14
NC
Vcc
NC
A16
A15
A12
A7
A6
A5
A4
A16~A0
DQ7~DQ0
32 Pin TSOP Normal
(Top View)
Address
Buffers
&
Latches
X-
Decoder
Control Logic
I/O Buffers &
Data Latches
Y-Decoder
1,048,576 bit
Super Flash
EEPROM
Cell Array
Pin Name
10~20
29~25,23~21
7
32
30
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A10
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
WE
OE
CE
A16-A0
DQ7-DQ0
CE
OE
WE
Vcc
Vss
NC
Address Inputs
Data Input/Output
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
IC804,805 74LCX373MTC(Low Voltage Octal
Transparent Latch)
Truth Table
Pin Descriptions
Logic Diagram
Inputs
Pin Names
Description
Outputs
Dn
X
L
H
X
OE
H
L
L
L
On
Z
L
H
O
0
LE
X
H
H
L
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
D
0
-D
7
LE
OE
O
0
-O
7
11
3
2
4
5
7
6
8
9
13
12
14
15
17
16
18
19
1
D
0
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
H = HIGH Voltege Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O
0
= Previous O
0
before HIGH-to-LOW
transition of Latch Enable
O
1
O
2
O
3
O
4
O
5
O
6
O
7
OE
D
G
O
D
G
O
D
G
O
D
G
O
D
G
O
D
G
O
D
G
O
D
G
O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
V
DD
DQ0
DQ1
V
SSQ
DQ2
DQ3
V
DDQ
DQ4
DQ5
V
SSQ
DQ6
DQ7
V
DDQ
LDQM
WE#
CAS#
PAS#
CS#
A11
A10
A0
A1
A2
A3
V
DD
V
SS
DQ15
DQ14
V
SSQ
DQ13
DQ12
V
DDQ
DQ11
DQ10
V
SSQ
DQ9
DQ8
V
DDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
V
SS
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
IC806,807 EM636165TS-8(SDRAM)
IC481 KIA78R05PI(Voltage Regulator)
Summary of Contents for 137 103 01
Page 47: ...SCHEMATIC DIAGRAM MPEG for AU SS and CA This is a basic schematic diagram 64 65 ...
Page 48: ...SCHEMATIC DIAGRAM MPEG for XE UK This is a basic schematic diagram 66 67 ...
Page 53: ...SANYO Technosound Co Ltd Osaka Japan Apr 01 3500 BB Printed in Japan ...
Page 61: ...MPEG P W BOARD SCHEMATIC DIAGRAM FOR WAVEFORM CHECK This is a basic waveform check 32 33 ...
Page 62: ...AMP P W BOARD SCHEMATIC DIAGRAM FOR WAVEFORM CHECK This is a basic waveform check 34 35 ...
Page 63: ...WIRING DIAGRAM MPEG A SIDE 68 69 ...
Page 64: ...WIRING DIAGRAM MPEG B SIDE 70 71 ...
Page 65: ...WIRING DIAGRAM DG SOCKET POWER SW for AU SS 74 75 DG SOCKET POWER SW ...
Page 66: ...WIRING DIAGRAM FRONT for AU SS 76 77 ...
Page 67: ...WIRING DIAGRAM DG SOCKET POWER SW for XE UK 80 81 DG SOCKET POWER SW SCART SW ...
Page 68: ...WIRING DIAGRAM FRONT for XE UK 82 83 ...
Page 69: ...WIRING DIAGRAM DG SOCKET POWER SW for CA 86 87 DG SOCKET POWER SW ...
Page 70: ...WIRING DIAGRAM FRONT for CA 88 89 ...
Page 72: ...SCHEMATIC DIAGRAM DVD TOP LEFT This is a basic schematic diagram 92 93 ...
Page 73: ...SCHEMATIC DIAGRAM DVD BOTTOM LEFT This is a basic schematic diagram 94 95 ...
Page 74: ...SCHEMATIC DIAGRAM DVD TOP RIGHT This is a basic schematic diagram 96 97 ...
Page 75: ...SCHEMATIC DIAGRAM DVD BOTTOM RIGHT This is a basic schematic diagram 98 99 ...