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CAPTION DATA SLICER (Continued)
REFERENCE VOLTAGE GENERATOR, COMPARATOR
The Reference Voltage Generator generates the reference voltage
corresponding to the amplitude of Clock Run-In Burst in line 21 field 1 of the
composite video. Line 21 is detected by the Line 21 Discriminator. The
composite video signal is compared with the reference voltage and converted
into digital pulses in the Comparator.
LINE 21 DISCRIMINATOR
The Line 21 Discriminator detects line 21 in which the caption data is
encoded. Line 21 discrimination is determined by counting the number of
separated horizontal sync pulses (Hsep) between the falling point of the
separated vertical sync pulse (Vsep) and the incoming line 21 of the
composite video signal, and then comparing the number to the data in the
Caption Position Register. Field discrimination is determined by the data in
the Data Slicer Control Register-1 and 2.
START BIT DETECTOR
The Start Bit Detector detects a start bit on Line 21 detected by the Line 21
Discriminator.
CLOCK RUN-IN DISCRIMINATOR
The Clock Run-In discrimination is accomplished by counting the number of
the output pulses from the Comparator in the window set up after the first
pulse of the Clock-Run In.
16-BIT SHIFT REGISTER
The output signal from the Comparator is stored in the 16-Bit Shift Register
only when the data clock is output. The caption data is obtained by reading
out the higher byte (8 bits) in the caption data from the Caption Data Register
2 and 4 and the lower byte in the caption data from the Caption Data Register
1 and 3, after the interrupt signal has been generated.
INTERRUPT SIGNAL GENERATOR
The Interrupt Signal Generator outputs the interrupt signal after the line 21
assigned by the Caption Position Register has been sliced off.
SYNC COUNTER
The Sync Counter counts the number of the composite sync pulses separated
from the composite video signal by the Data Slicer, or the horizontal sync
pulses (HSYNC) input from pin 1 of the CPU, and stores the counted data into
the Sync Pulse Counter Register.
