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IC BLOCK DIAGRAM & DESCRIPTION
IC821 K4S161622D-TC80(DREAM)
Input Function
Active on the positive going edge to sample all inputs.
Disables or enables device operation by masking or enabling all inputs except
CLK,CKE and L(U)DQM
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.
Row/column addresses are multiplexed on the same pins.
Row address : RA
0
- RA
10
, Column address : CA
0
- CA
7
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
Latchea column addresses on the positive going edge of the CLK with CAS low.
Enables column access.
Enables write operation and row precharge.
Latches data in starting from CAS, WE active.
Mskes data output Hi-Z, I
SHZ
sfter the clock and masks the output.
Blocks data input when L(U)DQM active.
Data inputs/outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
Isolated power supply and ground for the output buffers to provide improved noise
immunity.
This pin is recommended to be left No Connection on the device.
Pin
CLK
CS
CKE
A
0
- A
10/
AP
BA
RAS
CAS
WE
L(U)DQM
DQ
0
-
15
V
DD
/V
SS
V
DDQ
/V
SSQ
N.C/RFU
NAME
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Dsta Output Power/Ground
No Connection/
Reserved for Furure Use
Programming Register
Timing Register
Latency & Borst Length
Column Decoder
Data Input Register
Output Buf
fer
Row Decoder
LRAS
LCBR
Bank Select
LRAS
LCAS
LDQM
LWCBR
LCBR
LWE
Row Buf
fer
Refresh Counter
Col. Buf
fer
Address Register
I/O Control
512K x 16
512K x 16
35
20~24,
27~32
2,3,5,6,7,8,9,11,
12,39,40,42,43,
45,46,48,49
35
34
18
17
16
15
36
14
Sense AMP
CLK
ADD
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
DQ1
LDQM
LWE
LCKE
