−
2
−
Pin 1
2
3
49
3
H
V
Pin 9
Fig. 1-1.Optical Black Location (Top View)
Pin No.
1
Symbol
2, 3
4
5, 6
7, 10
8
9
11
12
13
15
16
V
φ
4
V
φ
2
V
φ
1B,
V
φ
1A
GND
V
OUT
V
DD
V
L
φ
RG
H
φ
1
H
φ
2
Pin Description
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Horizontal register transfer clock
Reset gate clock
Horizontal register transfer clock
GND
Signal output
Circuit power
Substrate clock
Protection transistor bias
Waveform
DC
DC
Voltage
-7 V, 0 V
-7 V, 0 V, 13 V
-7 V, 0 V
-7 V, 0 V, 13 V
13 V
-7V
0 V, 3.5 V
0 V, 3.5 V
Table 1-1. CCD Pin Description
φ
SUB
GND
DC
0 V
Aprox. 6 V
Aprox. 6 V
(Different from every CCD)
8 V, 11.5 V
When sensor read-out
Fig. 1-2. CCD Block Diagram
1. OUTLINE OF CIRCUIT DESCRIPTION
1-1. CA1 CIRCUIT DESCRIPTION
1. IC Configuration
IC903 (RJ23J1AA0AT)
CCD imager
IC902 (74VHC04MTC)
H driver
IC904 (LR366854)
V driver
IC905 (AD9802)
CDS, AGC, A/D converter
2. IC903 (CCD)
[Structure]
Interline type CCD image sensor
Optical size
1/2.7 inch format
Effective pixels
1292 (H)
×
966 (V)
Pixels in total
1344 (H)
×
971 (V)
Optical black
Horizontal (H) direction: Front 3 pixels, Rear 49 pixels
Vertical (V) direction:
Front 2 pixels, Rear 3 pixels
Dummy bit number
Horizontal : 28 Vertical : 2
V
φ
3B,
V
φ
3A
8
1
14
15
16
2
3
4
5
6
7
9
10
11
12
13
Ye
Cy
G
Ye
G
Ye
Mg
Cy
Mg
Cy
Cy
Mg
Cy
Mg
G
Ye
G
Ye
Ye
Cy
（
Note
）
V
DD
GND
φSUB
V
L
φRG
NC
Hφ
1
Hφ
2
G
Mg
G
Mg
V
φ4
V
φ3A
V
φ2
V
φ1B
V
φ1A
GND
V
φ3B
V
OUT
（
Note
）:
Photo sensor
Vertical register
Horizontal register
