5-4
Trip and Target Logic
Date Code 20011205
SEL-311B Instruction Manual
·
One of the following occurs:
-
SEL
OGIC
control equation setting ULTR asserts to logical 1,
-
The front-panel TARGET RESET button is pressed,
-
Or the
TAR R
(Target Reset) command is executed via the serial port.
The front-panel TARGET RESET button or the
TAR R
(Target Reset) serial port command is
primarily used during testing. Use these to force the TRIP Relay Word bit to logical 0 if test
conditions are such that setting ULTR does not assert to logical 1 to automatically deassert the
TRIP Relay Word bit instead.
Other Applications for the Target Reset Function
Note that the combination of the TARGET RESET Pushbutton and the
TAR R
(Target Reset)
serial port command is also available as Relay Word bit TRGTR. See Figure 5.4 and
accompanying text for applications for Relay Word bit TRGTR.
Factory Settings Example (Using Setting TR)
In this example the DTT and “switch-onto-fault” trip logic at the top of Figure 5.1 are not used.
The SEL
OGIC
control equation trip setting TR is now the only input into OR-1 gate and flows
into the “seal-in and unlatch” logic for Relay Word bit TRIP.
The factory settings for the trip logic SEL
OGIC
control equation settings are:
TR = M1P + Z1G + M2PT + Z2GT + 51GT + 51QT + OC
(trip conditions)
ULTR = !(50L + 51G)
(unlatch trip conditions)
The factory setting for the Minimum Trip Duration Timer setting is:
TDURD = 9.000 cycles
See the settings sheets in
Section 9: Setting the Relay
for setting ranges.
Set Trip
In SEL
OGIC
control equation setting TR = M1P + Z1G + M2PT + Z2GT + 51GT + 51QT + OC:
·
Distance elements M1P, M2PT, Z1G, and Z2GT and time-overcurrent elements 51GT
and 51QT trip directly. Time-overcurrent and definite-time overcurrent elements can be
torque controlled (e.g., elements 51GT and 51QT are torque controlled by SEL
OGIC
control equation settings 51GTC and 51QTC, respectively). Check torque control
settings to see if any control is applied to time-overcurrent and definite-time overcurrent
elements. Such control is not apparent by mere inspection of trip setting TR or any
other SEL
OGIC
control equation trip setting.
·
Relay Word bit OC asserts for execution of the OPEN Command. See
OPE Command
(Open Breaker)
in
Section 10: Serial Port Communications and Commands
for more
information on the OPEN Command.
With setting TDURD = 9.000 cycles, once the TRIP Relay Word bit asserts via SEL
OGIC
control
equation setting TR, it remains asserted at logical 1 for a minimum of 9 cycles.
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