9.31
Date Code 20080213
Instruction Manual
SEL-351A Relay
Setting the Relay
Relay Word Bits (Used in SEL
OGIC
Control Equations)
43
*
c
*
c
*
c
TRIP
Trip logic output asserted (see
Output contact assignment
OC
d
Asserts 1/4 cycle for
OPEN
command execution (see the Note following
and the Note in
Testing
CC
d
Asserts 1/4 cycle for
CLOSE
command execution (see the Note in
, following
)
DCHI
b
Station dc battery instantaneous overvoltage element (see
)
Indication
DCLO
b
Station dc battery instantaneous undervoltage element (see
)
44
*
c
*
c
*
c
*
c
PDEM
Phase demand current above pickup setting PDEMP (see
)
NDEM
Neutral-ground demand current above pickup setting NDEMP (see
GDEM
Residual-ground demand current above pickup setting GDEMP (see
QDEM
Negative-sequence demand current above pickup setting QDEMP (see
45 to
56
*
c
Relay Word bits in rows 45–56 are not used in this version of the SEL-351
Relay Family
57
*
c
*
c
*
c
*
c
*
c
*
c
TSOK
Time Synchronization OK (see
Synchrophasor Relay Word Bits on
)
Synchrophasors
TIRIG
Relay Time is based on IRIG-B time source (see
)
58
*
c
*
c
*
c
*
c
*
c
*
c
*
c
DELTA
Delta configuration element (asserts when global setting PTCONN =
DELTA; see
Indication
Table 9.6
Relay Word Bit Definitions for SEL-351A
(Sheet 14 of 16)
Row
Bit
Definition
Primary Application
Summary of Contents for SEL-351A
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