4.10
SEL-700G Relay
Instruction Manual
Date Code 20170814
Protection and Logic Functions
Group Settings (SET Command)
q
From Figure 4.12.
NOTE: n = 1, 2, or 3; SLP12 = min(2 • SLP1, 50); SLP22 = max(SLP2, 50).
Figure 4.5
Differential Element Logic
Figure 4.6
Differential Element Harmonic Blocking Logic
Conditions
f1(IRTn) Output
If INRn = 1
IRTn • SLP2
If INRn = 0 and O87P < IRTn <IRS1
IRTn • SLP1
If INRn = 0 and IRTn > IRS1
IRTn • SLP2 + IRS1 • (SLP1–SLP2)
Conditions
f2(IRTn) Output
If AO87P2 < IRTn < IRS1
IRTn • SLP12
If IRTn > IRS1
IRTn • SLP22 + IRS1 • (SLP12–SLP22)
_
+
_
+
_
+
_
+
2 CYC
10 CYC
IOPn
U87P
(setting)
87Un
87SNn
87HSNn
f1(IRTn)
Σ
c
5HB1
87OSNn
IRTn
O87P
(setting)
I1H24
Relay
Word
Bits
INRn
0.05
_
+
_
+
_
+
f2(IRTn)
Σ
c
5HBn
AO87P2
HSM=0
HSM=0
87SCn
87HSCn
HSM
87HRn
HSM=1
HSM=1
INRn
87OSCn
q
87Rn
Sensitive
Differential
Logic
High Security
Differential
Logic
Relay
Word
Bits
87HB
_
+
_
+
_
+
5HB2
87R1
87BL1
87R2
87BL2
87R3
87BL3
2_4HBL
2_4HB1
5HB3
2_4HB2
2_4HB3
5HB1
5th
Harmonic
Blocking
4th
Harmonic
Blocking
2nd
Harmonic
Blocking
HBLK=Y
I1H2
I1H4
I1H5
IOP1
Relay
Word
Bits
Relay
Word
Bits
Relay
Word
Bits
Relay
Word
Bit
Summary of Contents for SEL-700G Series
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