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© Sealevel Systems, Inc.
4021 Manual | SL9154 11/2021
Technical Description
The
ACB 56
utilizes the Zilog 85230 Enhanced Serial Communications Controller (ESCC). This chip features
programmable baud rate, data format and interrupt control, as well as DMA control. Refer to the
User’s
Manual and the Zilog SCC Handbook for details on programming the 85230 ESCC chip.
Features
•
One channel of Sync/Async communications using 85230
•
DMA supports data rate greater than 1 million bps (Bits Per Second)
•
SCC channel B asynchronous port for CSU/DSU Command Port
•
Selectable port address, IRQ level (2/9, 3, 4, 5, 10, 11, 12, 15), and DMA Channel (1 or 3)
Internal Baud Rate Generator
The baud rate of the SCC is programmed under software control. The standard oscillator supplied with the
board is 7.3728 MHz. However, other oscillator values can be substituted to achieve different baud rates.