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© Sealevel Systems, Inc.
4030 Manual | SL9362 9/2021
Wait States
The PIO-48 has the option of inserting one 500 nS wait state for each access. This may be required on
certain machines with bus clocks in excess of 8 MHz. With the wide variety of machines available, no
concrete rules exist concerning wait states. If the PIO-48 does not seem to be responding properly, try
inserting a wait state.
To enable wait state insertion, set position 8 of the dip-switch to "ON". To disable wait states, set position
8 "OFF".
Interrupt Headers J5 and J6
The headers marked J5 and J6 allow the use of interrupts with the parallel ports. J5 selects IRQ2 through
IRQ7 for Port 1 (U9 and J1), while J6 selects the IRQ for Port 2 (U16 and J3).
IRQ Header E2
Optional Cable Connector P4
Discrete access to both sides of all relays is provided by attaching the optional cable (CA-108) to pin
header P4 with the colored edge of the ribbon cable attached to pin one. Removing all the jumpers
connecting row P1 to P2 places the A-side of each relay at the on-board DB-37 and the B-side at the
optional cable’s DB
-37.