SBC-C43
SBC-C43 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: A.R. - Reviewed by S.R. -Copyright © 2020 SECO S.p.A.
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MIPI_CSI1_MCKL_OUT: Master Clock, it is managed by CSI Host Controller. It is suggested,
however, to use camera modules with onboard crystal / oscillator, and avoid using this signal.
Indeed, it could cause problems for EMI compliance requirements.
MIPI_CSI1_I2C0_SCL: general purpose I2C Bus clock line. Output signal, electrical level
+1.8V_RUN with a 2k2
-up resistor.
MIPI_CSI1_I2C0_SDA: general purpose I2C Bus data line. Bidirectional signal, electrical level
+1.8V_RUN with a 2k2
-up resistor.
MIPI_CSI0_RST_B: External camera module reset signal output, it is an active low signal.
TRSS Audio jack
On SBC-C43 board, audio functionalities are controlled by an I2S Audio Codec type TLV320AIC3204IRHBR.
It is possible to have Stereo Line Out and Mic In Audio functionalities, all of them on a single TRRS Combo Audio Jack,
i.e. a single jack which offer both stereo Line Out and Mic In functionalities.
Such TRRS Combo Audio jack can be used with any 4-poles 3.5mm diameter audio jack, with pinout compatible with
the most recent Headsets, shown in the table on the left.
5
CSI_P1_DN1
14
MIPI_CSI1_MCKL_OUT
6
CSI_P1_DP1
15
MIPI_CSI1_I2C0_SCL
7
CSI_P1_CKN
16
MIPI_CSI1_I2C0_SDA
8
CSI_P1_CKP
17
MIPI_CSI1_RST_B
9
GND
18
+3.3V_RUN
TRRS Audio jack- CN40
Pin
Signal
TIP
Headphone Out Left Channel
RING1
Headphone Out Right Channel
RING2
GND
SLEEVE MIC_IN