J.9
Date Code 20100129
Instruction Manual
SEL-751A Relay
Relay Word Bits
Definitions
DNAUX
n
DeviceNet/Modbus AUX
n
assert bit, where
n
= 1 to 8.
30
DNAUX
n
DeviceNet/Modbus AUX
n
assert bit, where
n
= 9 to 11.
31
DSABLSET
Settings changes not allowed from the front-panel interface—when asserted.
22
DST
Daylight Savings Time (Synchrophasors).
112
DSTP
Daylight Savings Time Pending (Synchrophasors).
112
ENABLED
Relay Enabled.
0
ER
Event report trigger SEL
OGIC
control equation (see
).
29
FAULT
Fault indication. Asserts when the SEL
OGIC
control equation FAULT result in a logical 1.
13
FREQTRK
Asserts when relay is tracking frequency.
29
GFLT
Ground fault (50G1 + 50G2 + 50G3 + 50G4 + 51G1 + 51G2)
117
GNDEM
Zero-Sequence Current Demand Pickup
109
HALARM
Hardware alarm (see
22
IN101
Contact input.
17
IN102
Contact input.
17
IN
nnn
Contact input
nnn
, where
nnn
= 301 to 304 (available only with optional I/O module).
18
IN
nnn
Contact input
nnn
, where
nnn
= 401 to 404 (available only with optional I/O module).
19
IN
nnn
Contact input
nnn
, where
nnn
= 501 to 504 (available only with optional I/O module).
20
IRIGOK
IRIG-B input OK.
13
LB01 to LB08
Local Bit
n
asserted, where
n
= 1 to 8.
35
LB09 to LB16
Local Bit
n
asserted, where
n
= 9 to 16.
36
LB17 to LB24
Local Bit
n
asserted, where
n
= 17 to 24.
37
LB25 to LB32
Local Bit
n
asserted, where
n
= 25 to 32.
38
LBOKA
Channel A, looped back ok.
92
LBOKB
Channel B, looped back ok.
92
LINKA
Assert if Ethernet Port A detects link.
13
LINKB
Assert if Ethernet Port B detects link
13
LINKFAIL
Failure of active Ethernet port link
27
LOP
Loss-of-Potential logic asserted (see
14
LPSEC
Direction of the upcoming leap second. During the time that LPSECP is asserted, if LPSEC is
asserted, the upcoming leap second is deleted; otherwise, the leap second is added (synchropha-
sors)
112
LPSECP
Leap second pending (synchrophasors)
112
LT
nn
Latch Bit
nn
asserted, where
nn
).
51
LT
nn
Latch Bit
nn
asserted, where
nn
).
52
LT
nn
Latch Bit
nn
asserted, where
nn
).
53
LT
nn
Latch Bit
nn
asserted, where
nn
).
54
OC
Open command—asserts when serial port command
OPEN
or front-panel or Modbus/DeviceNet
OPEN
command is issued (see
and
).
29
OPTMN
Open interval timer is timing.
27
ORED50T
Logical OR of all the instantaneous overcurrent elements tripped outputs (see
).
1
ORED51T
Logical OR of all the time-overcurrent elements tripped outputs (see
through
).
1
Table J.2
Relay Word Bit Definitions for the SEL-751A
(Sheet 6 of 11)
Bit
Definition
Row
Summary of Contents for 751A
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