LL-T15S3
APPENDIX : IC DESCRIPTION
6 – 2
1-2. PIN DESCRIPTION
Pin
No.
Name
Type
Definition
001 DIBVDD
Digital Input Buffer Power
002 CAP_HREF
I
Port B Horizontal Active Qualifier
003 CAP_HSYNC
I
Port B Horizontal Sync Input
004 CAP_VSYNC
I
Port B Vertical Sync Input
005 DIBVSS
Ground Digital Input Buffer Ground
006 BLU_INB_0/Y0
I
Port B Blue Input Bit 0/YUV Data Input
Y0
007 BLU_INB_1/Y1
I
Port B Blue Input Bit 1/YUV Data Input
Y1
008 BLU_INB_2/Y2
I
Port B Blue Input Bit 2/YUV Data Input
Y2
009 BLU_INB_3/Y3
I
Port B Blue Input Bit 3/YUV Data Input
Y3
010 BLU_INB_4/Y4
I
Port B Blue Input Bit 4/YUV Data Input
Y4
011 BLU_INB_5/Y5
I
Port B Blue Input Bit 5/YUV Data Input
Y5
012 BLU_INB_6/Y6
I
Port B Blue Input Bit 6/YUV Data Input
Y6
013 BLU_INB_7/Y7
I
Port B Blue Input Bit 7/YUV Data Input
Y7
014 DCVDD
Power Digital Core Power
015 GRN_INB_0
I
Port B Green Input Bit 0
016 GRN_INB_1
I
Port B Green Input Bit 1
017 GRN_INB_2
I
Port B Green Input Bit 2
018 GRN_INB_3
I
Port B Green Input Bit 3
019 GRN_INB_4
I
Port B Green Input Bit 4
020 GRN_INB_5
I
Port B Green Input Bit 5
021 GRN_INB_6
I
Port B Green Input Bit 6
022 GRN_INB_7/
RTS0
I
Port B Green Input Bit 7
023 DCVSS
Ground Digital Core Ground
024 RED_INB_0/
UV0
I
Port B Red Input Bit 0/YUV Data Input
UV0
025 RED_INB_1/
UV1
I
Port B Red Input Bit 1/YUV Data Input
UV1
026 RED_INB_2/
UV2
I
Port B Red Input Bit 2/YUV Data Input
UV2
027 RED_INB_3/
UV3
I
Port B Red Input Bit 3/YUV Data Input
UV3
028 RED_INB_4/
UV4
I
Port B Red Input Bit 4/YUV Data Input
UV4
029 RED_INB_5/
UV5
I
Port B Red Input Bit 5/YUV Data Input
UV5
030 RED_INB_6/
UV6
I
Port B Red Input Bit 6/YUV Data Input
UV6
031 RED_INB_7/
UV7
I
Port B Red Input Bit 7/YUV Data Input
UV7
032 DIBVDD
Power Digital Input Buffer Power
033 DVDD
Power Digital VDD
034 DVSS
Ground Digital ground
035 DTEST
O
Digital test output
036 VCCD
Power Digital power
037 DGND
Ground Digital ground
038 VGA_VSYNC
I
Port A vertical SYNC
039 VGA_HSYNC
I
Port A horizontal SYNC
040 SOGI
I
Port A Sync-On-Green input
041 VCCA
Power Analog power for PLL
042 AGND
Ground Analog ground for PLL
043 VREF
I
External 25V reference voltage
044 CP
I
PLL loop filter for pole
045 CZ
I
PLL loop filter for zero
046 VCCAB
Power B channel analog power
047 BI
I
B channel analog input
048 GNDAB
Ground B channel analog ground
049 BCLP
O
B channel internal clamp voltage out-
put
050 VTOP
O
ADC resistor ladder top decoupling
capacitor
051 VBOT
O
ADC resistor ladder bottom decou-
pling capacitor
052 VCCAG
Power G channel analog power
053 GI
I
G channel analog input
054 GNDAG
Ground G channel analog ground
055 GCLP
O
G channel internal clamp voltage out-
put
056 TOUTP
O
Differential testing output plus
057 TOUTM
O
Differential testing output minus
058 VCCAR
Power R channel analog power
059 RI
I
R channel analog input
060 RNDAR
Ground R channel analog ground
061 RCLP
O
R channel internal clamp voltage out-
put
062 ADVDD
(VDD_PLL)
Power Display PLL Analog Power
063 ADVSS
(VSS_PLL)
Ground Display PLL Analog Ground
064 DCVSS
Ground Digital Core Ground
065 OSD_FSW
I
External OSD Window Display Enable
066 OSD_CLK
O
Clock Output For External OSD Con-
troller Chip
067 OSD_R
I
R Data Input From External OSD Con-
troller Chip
068 OSD_G
I
G Data Input From External OSD Con-
troller Chip
069 OSD_B
I
B Data Input From External OSD Con-
troller Chip
070 OSD_I
I
Intensity Input From Ext OSD Control-
ler Chip
071 DCVDD
Power Digital Core Power
072 Reserved
R
Reserved
073 XTAL
O
Crystal Out
074 XTALI
I
Crystal Input
075 DIBVSS
Ground Digital Input Buffer Ground
076 DISP_DE
O
Display Enable
077 DISP_VSYNC
O
Display Vertical Sync
Pin
No.
Name
Type
Definition
