-
PC-1600
4·3.
Sub CPU operation
(Interfacing
with the main CPU)
TC8576F (UART)
LU57813P (sub CPU)
D7-
(data
DSTB
KI
BUSY
ZlD
ACK
Z9
DATAS
Rl3~ROO
DATAl
r-----------,
I
,
I
I
I
,
,
,
)0
_.
,
Buffer
....
'
R33~R20
bus)
<
,
-
,
,
I
I
,
,
,
f
I
,
-_.-
,
10RP
(from SC7852)
,
~------r---~
Contained in the LR38041 gate array
Fig.4
Signals
interfaced
with
the
main
CPU
are
KI, Z10,
Z9,
R13~ROO,
and R33~R20.
RI3-ROO=:>(
Command
X'-
_
KI
~
Z10
~ ..... 'B~;;"
---r
=fJt
'9.5µ,
Ready
Ready
Z9
R33-R20
X
10RP
Return data
The following
shows signal timings.
Send command
---------,
I
I
I
Read retu rn data
-~-
CD
Before
the
Z·80
CPU
sends
a command
to
the
sub
CPU, the sub CPU is asked
if it is ready
to receive
the
command.
If it is not,
the
Z·80
waits
until
the
sub
CPU becomes
ready.
The
Z·80
assumes
the
sub
CPU
to
be
ready
if the
BUSY input
of the UART
is high.
®
Next,
8·bit
command
data
are sent
to the
sub
CPU.
The
Z·80
sends
the da ta on the DA TAl ~DA T A8 port
of
the
UART,
wh ich
are
received
by the
sub
CPU
through
R13~ROO.
Unless ACK is returned
within
one
second,
the
Z·80
proceeds
to the next processing.
®
The
Z·80
sends a pulse signal on DST8
of the UART
in
order
to
inform
the
sub
CPU
a command
request,
which
the sub CPU receives
of through
the Klline.
With
the
KI line
of
the
sub
CPU high,
an interrupt
is se nt to the sub CPU, and the command
is processed
in the interrupt
service
routine.
G)
One of the following
requests
may be made depending
on the command
issued from
the
Z·80.
(i)
Arequest
for return
data
(ii)
Arequest
not to return
data
The
sub
CPU then
interprets
the above
to proceed
to
the next step,
(i
I
A
pulse
signal
is sent
on
Z9
after
sending
the
return
data
on R33~R20,
to indicate
completion
of the command
execution.
(ii)
A pulse
signal
is sent
on Z9 to
indicate
receipt
of the command.
In either
case,
the
Z·80
waits
for
a high
pulse
signal
state
on
Z9.
The
high
state
received
on
Z9
is then
input
to the
ACK
line
of
the
UART
and
latched
internallv,
The
Z·80
checks
the latch if it is okay.
®
When
the
Z·80
accesses
33H
of
1/0
to
request
the
return
data,
it forces
10RP to low so that the LR38041
gate array
internal
buffer
is opened
to send the return
data
(R33~R20)
on the Z·80
bus D7~DO.
Summary of Contents for PC-1600
Page 42: ... 11 CIRCUIT DIAGRAM PARTS POSITION KEY P W B LCD SIDE 39 ...
Page 43: ...PC l600 40 ...
Page 44: ...PC 1000 KEY P W B LSI SIDE 41 ...
Page 45: ... 42 ...
Page 48: ... PC l600 F P C P W B 45 ...
Page 49: ... Kn 46 ...
Page 52: ... PC l600 CONNECTOR P W B 49 ...
Page 53: ... 50 ...
Page 55: ... __ PC l600 tli I ONLY Pc 1600K I I 1 I 52 l J ...
Page 56: ... PC l600 K MEMORY P W B ROM Cut c IJ O lJ1F C O lJ1F I Bend capacitor to inward ROM SIDE 53 ...
Page 57: ...RAM SIDE 54 ...
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Page 117: ... PC I600 ...