SD-CX1W
– 82 –
IC3 VHiTC9490F/-1: Servo/Signal Control (TC9490F) (2/2)
39
AVDD3
Input
Analog 3.3 V power supply terminal.
40
FMO
Output
Feed equalizer output terminal.
41
DMO
Output
Disc equalizer output terminal.
42
VSS3
—
Digital GND terminal.
43
VDD3
Input
Digital 3.3 V power supply terminal.
44
TESIN
Input
Test input terminal. Usually "L" fixed.
45
XVSS3
—
GND terminal for system clock oscillation circuit.
46
XI
Input
System clock oscillation circuit input terminal.
47
XO
Output
System clock oscillation circuit output terminal.
48
XVDD3
Input
3.3 V power supply terminal for system clock oscillation circuit.
49
DVSS3
—
GND terminal for D/A converter.
50
RO
Output
R channel data normal rotation output terminal.
51
DVDD3
Input
3.3 V power supply terminal for D/A converter.
52
DVR
—
Reference voltage terminal.
53*
LO
Output
L channel data normal rotation output terminal.
54
DVSS3
—
D/A converter section GND terminal.
55*
ZDET
Output
1-bit D/A converter 0 detection flag output terminal.
56
VSS5
—
GND terminal for microcomputer interface.
57-60
BUS0-BUS3
Input/Output
Data input/output terminal for microcomputer interface.
61
BUCK
Input
Clock input terminal for microcomputer interface.
62
/CCE
Input
Chip enable signal input terminal for microcomputer interface.
In case of "L", BUS3-0 are active.
63
/RST
Input
Reset signal input terminal. Reset: "L".
64
VDD5
Input
5 V power supply terminal for microcomputer interface.
Pin No.
Terminal Name
Function
Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Note: AI/F: Analog input/output terminal.
3-5I/F: Terminal with a built-in 3-5 interface (5 V system input/output terminal).
3I/F: 3 V system input/output terminal.
Figure 82 BLOCK DIAGRAM OF IC
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TEZI
DV
SS3
TEI
RO
SBAD
DV
DD3
FEI
DVR
RFRP
LO
RFZI
DV
SS3
RFCT
ZDET
AV
DD3
V
SS5
RFI
BUS0
SLCOI
BUS1
AV
SS3I
BUS2
VCOF
BUS3
PVREF
BUCK
LPFO
/CCE
LPFN
/RST
TMAX
V
DD5
XV
DD3
BCK
XO
LRCK
XI
AOUT
XV
SS3
DOUT
TESIN
IPF
V
DD3
V
DD3
V
S33
V
SS3
DMO
SBOK
FMO
CLCK
AV
DD3
DATA
SEL
SFSY
TEBC
SBSY
RFGC
/HSO
V
REF
/UHSO
TRO
PV
DD3
FOO
PDO
LPF
1-bit
DAC
16k
RAM
PWM
D/A
A/D
ROM
RAM
CLV servo
VCO
PLL
TMAX
Clock
generator
Address
circuit
Correction
circuit
Microcomputer
interface
Audio
output
circuit
Digital
out
Sub-code
demodulation
circuit
Synchronizing
signal guarantee
EFM demodulation
Data
slicer
Digital equalizer
adjustment circuit
Servo
control
Summary of Contents for SD-CX1W(BL)
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Page 115: ...SD CX1W 16 M E M O ...