Data Mapping
UM353-1B
April
2012
6-6
6.3.2 Variable Loop Integer Data
Controller [ODC]
Code
R/W
Description
Range
Register (MB)
L#TSPI
R/W
Target Setpoint (%)
-3.3 to 103.3 ($0-$0FFF)
40451+30(#-1)
L#HLI
R/W
Setpoint
High Limit (%)
-3.3 to 103.3 ($0-$0FFF)
40452+30(#-1)
L#LLI
R/W
Setpoint Low Limit (%)
-3.3 to 103.3 ($0-$0FFF)
40453+30(#-1)
L#RTI
R/W
Setpoint Ramp Time (min)
0-3840($0080-$0F80)
40454+30(#-1)
L#RRI
R/W
Setpoint Ramp Rate (%/min)
-3.3 to 103.3 ($0-$0FFF)
40455+30(#-1)
L#A1LI
R/W
Alarm 1 Limit (%)
-3.3 to 103.3 ($0-$0FFF)
40456+30(#-1)
L#A2LI
R/W
Alarm 2 Limit (%)
-3.3 to 103.3 ($0-$0FFF)
40457+30(#-1)
L#A3LI
R/W
Alarm 3 Limit (%)
-3.3 to 103.3 ($0-$0FFF)
40458+30(#-1)
L#A4LI
R/W
Alarm 4 Limit (%)
-3.3 to 103.3 ($0-$0FFF)
40459+30(#-1)
L#T1mI
R/W
Tot. Preset 1 - 3 ms whole digits
0-999 ($0000-$03E7)
40460+30(#-1)
L#T1lI
R/W
Tot. Preset 1 - 3 ls whole digits
0-999 ($0000-$03E7)
40461+30(#-1)
L#T2mI
R/W
Tot. Preset 2 - 3 ms whole digits
0-999 ($0000-$03E7)
30(#-1)
L#T2lI
R/W
Tot. Preset 2 - 3 ls whole digits
0-999 ($0000-$03E7)
40463+30(#-1)
L#A1TI
R/W
Alarm 1 Type
0-6 ($0000-$0006)
40464+30(#-1)
L#A2TI
R/W
Alarm 2 Type
0-6 ($0000-$0006)
40465+30(#-1)
L#A3TI
R/W
Alarm 3 Type
0-6 ($0000-$0006)
40466+30(#-1)
L#A4TI
R/W
Alarm 4 Type
0-6 ($0000-$0006)
40467+30(#-1)
L#A1PI
R/W
Alarm 1 Priority
1-5 ($0001-$0005)
40468+30(#-1)
L#A2PI
R/W
Alarm 2 Priority
1-5 ($0001-$0005)
40469+30(#-1)
L#A3PI
R/W
Alarm 3 Priority
1-5 ($0001-$0005)
40470+30(#-1)
L#A4PI
R/W
Alarm 4 Priority
1-5 ($0001-$0005)
40471+30(#-1)
L#CAI
R/W
Controller Action
1-DIR, 0-REV
40472+30(#-1)
(spare)
0
($0000)
40473+30(#-1)
….. …..
…..
…..
…..
(spare)
0
($0000)
40480+30(#-1)
Sequencer [ODS] - (MASK Configurations)
Code
R/W
Description
Range
Register (MB)
L#S001G0I
R/W
Step 1 Group 0 Input Mask
$0000-$FFFF
40451+30(#-1)
L#S001G0O
R/W
Step 1 Group 0 Output Mask
$0000-$FFFF
40452+30(#-1)
L#S001G1I
R/W
Step 1 Group 1 Input Mask
$0000-$FFFF
40453+30(#-1)
L#S001G1O
R/W
Step 1 Group 1 Output Mask
$0000-$FFFF
40454+30(#-1)
L#S001G2I
R/W
Step 1 Group 2 Input Mask
$0000-$FFFF
40455+30(#-1)
L#S001G2O
R/W
Step 1 Group 2 Output Mask
$0000-$FFFF
40456+30(#-1)
L#S002G0I
R/W
Step 2 Group 0 Input Mask
$0000-$FFFF
40457+30(#-1)
L#S002G0O
R/W
Step 2 Group 0 Output Mask
$0000-$FFFF
40458+30(#-1)
…..
…..
…..
…..
…..
L#S005G0O
R/W
Step 5 Group 0 Output Mask
$0000-$FFFF
40476+30(#-1)
L#S005G1I
R/W
Step 5 Group 1 Input Mask
$0000-$FFFF
40477+30(#-1)
L#S005G1O
R/W
Step 5 Group 1 Output Mask
$0000-$FFFF
40478+30(#-1)
L#S005G2I
R/W
Step 5 Group 2 Input Mask
$0000-$FFFF
40479+30(#-1)
L#S005G2O
R/W
Step 5 Group 2 Output Mask
$0000-$FFFF
40480+30(#-1)
Summary of Contents for 353
Page 12: ...Contents UM353 1B x April 2012 ...
Page 22: ...Introduction UM353 1B April 2012 1 10 ...
Page 30: ...Configuration Overview UM353 1B April 2012 2 8 ...
Page 122: ...Function Blocks UM353 1B April 2012 3 92 ...
Page 168: ...Data Mapping UM353 1B April 2012 6 28 ...
Page 204: ...Controller and System Test UM353 1B April 2012 9 8 ...
Page 222: ...Calibration UM353 1B April 2012 11 4 ...
Page 226: ...Circuit Description UM353 1B April 2012 12 4 ...
Page 238: ...Model Designation and Specifications UM353 1B April 2012 13 12 EC Declaration of Conformity ...
Page 240: ...Model Designation and Specifications UM353 1B April 2012 13 14 ...
Page 244: ...Abbreviations And Acronyms UM353 1B 14 4 April 2012 ...