English
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Siemens plc 1993
7.5.1.6 Clearing a Trip
When a trip occurs, it must be acknowledged before the inverter can be run again.
To acknowledge a trip, transmit a message with TRIP ACKNOWLEDGE (bit 7 PZD1) set to 0, followed by a
message with TRIP ACKNOWLEDGE set to 1.
This will clear the trip condition and leave the inverter in SWITCH ON INHIBIT mode. This can be cleared with
OFF1
(see section 7.5.1.1).
7.5.1.7 Reading Fault Codes
If a trip occurs in the inverter, subsequent reply messages will contain FAULT (PZD1 bit 3) set to 1. Once the trip has
been acknowledged, this bit will be returned set to 0.
No special facility exists to read fault codes. The most recent fault code can be obtained by reading parameter P48,
as described in section 7.5.1.4.
7.5.1.8 Reading Current
The command to read current is specific to 6SE21 and may, or may not, have the same effect with other inverters.
To read current, set READ CURRENT (bit 15 PZD1) to 1 and transmit.
The reply message will contain the current reading in PZD2 as a value scaled to 0.1 A. PZD1 bit 15 will be set to 1 to
indicate this.
7.5.1.9 Jog
To request JOG, set the bit INCHING 1 (PZD1 bit 8) to 1.
To stop the inverter, set both INCHING 1 and INCHING 2 to 0. The inverter will ramp down via OFF1.
Jog direction is specified by the ON LEFT (PZD1 bit 12) and ON RIGHT (PZD1 bit 11) bits.
The reply message will have OPERATION ENABLED (PZD1 bit 2) set to 1 when the inverter is jogging.
7.5.1.10 Stop Ramp Generator
When STOP RAMP GENERATOR (PZD1 bit 5) is set to 0, the inverter will remain at the output frequency it had at
the instant of receiving this command.
This condition will remain until a message is received with this bit set to 1. At this point, normal ramping will be
resumed.
7.5.1.11 Inhibit Ramp
Transmitting a message with PZD1 bit 4 set to 0 will cause the output of the ramp function generator to be
temporarily forced to 0.
This is equivalent to RUN with a frequency demand of 0.0 Hz.
The inverter will ramp down to 0.0 Hz if this command is issued while running.
Set this bit to 1 to resume normal operation.
7.5.1.12 Inhibit Set–point
Transmitting a message with PZD1 bit 6 set to 0 will cause the frequency set–point to be temporarily forced to 0.
This has been implemented in the same manner as ‘Inhibit Ramp’ on the 6SE21
(see section 7.5.1.11).
Summary of Contents for 6SE2101-1AA01
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