Communications configuring
3-168
System- and communication configuring D7-SYS - SIMADYN D
Edition 12.2003
The basic clock cycle time must be set in HWConfig in the properties
window under the "Basic clock cycle" tab.
The basic sampling time must match the PWM frequency set in the
MASTERDRIVE MC (the factory setting is: 5 kHz, parameter P340). The
time sectors are derived from this frequency.
The usual values are 3.2 ms, 1.6 ms and 0.8 ms, to which the system can
be synchronized. 1.6 or 3.2 ms are set depending on the control type.
The value, set as the base sampling time, must also be entered in
parameter P746 of the MASTERDRIVES MC.
Fig. 3-63
Basic clock cycle in the HW Config
Basic clock cycle
