Data Mapping
UM353-1
March
2003
7-12
7.3.5 Variable Loop Floating Point Data (32-bit IEEE)
Controller [ODC]
Code
R/W
Description
Range
Register (MB)
C/P (LIL)
L#TSPF R/W Target
Setpoint Real
42451+60(#-1)
n+1/13-14
L#HLF
R/W
Setpoint High Limit Real 42453+60(#-1)
n+1/17-18
L#LLF
R/W
Setpoint Low Limit
Real
42455+60(#-1)
n+1/19-20
L#RTF
R/W
Setpoint Ramp Time (min) Real
42457+60(#-1) n+1/15-16
L#RRF
R/W
Setpoint Ramp Rate (units/min) Real
42459+60(#-1)
n+1/21-22
L#A1LF
R/W
Alarm 1 Limit
Real
42461+60(#-1)
n+4/13-14
L#A2LF
R/W
Alarm 2 Limit
Real
42463+60(#-1)
n+4/15-16
L#A3LF
R/W
Alarm 3 Limit
Real
42465+60(#-1)
n+4/17-18
L#A4LF
R/W
Alarm 4 Limit
Real
42467+60(#-1)
n+4/19-20
L#T1F
R/W
Totalizer Preset 1
Real
42469+60(#-1)
n+3/15-16
L#T2F
R/W
Totalizer Preset 2
Real
42471+60(#-1)
n+3/17-18
L#Q1F
R/W
Quickset Hold 1
Real
42473+60(#-1)
n+1/41-42
L#Q2F
R/W
Quickset Hold 2
Real
42475+60(#-1)
n+2/41-42
L#BHLF
R/W
Batch Switch High Limit Real
42477+60(#-1) n+1/35-36
L#BLLF
R/W
Batch Switch Low Limit
Real
42479+60(#-1)
n+2/35-36
L#BPLF
R/W
Batch Switch Pre-Load
Real
42481+60(#-1)
n+3/35-36
L#BGF
R/W
Batch Switch Gain Real 42483+60(#-1)
n+4/35-36
(spares)
($00000000)
42485-42509+60(#-1)
Sequencer (Timers - Running Values) [ODS]
Code
R/W
Description
Range
Register (MB)
C/P (LIL)*
L#DYT01ET
R
DYT01 Elapsed Time
Real
42451+60(#-1)
n/61-62
L#DYT01RT R/W
DYT01 Remaining Time Real
42453+60(#-1)
n/63-64
L#OST01ET
R
OST01 Elapsed Time
Real
42455+60(#-1)
n+1/61-62
L#OST01RT R/W
OST01
Remaining
Time Real
42457+60(#-1)
n+1/63-64
L#RCT01ET
R
RCT01 Elapsed Time
Real
42459+60(#-1)
n+2/61-62
L#RCT01RT
R/W
RCT01 Remaining Time Real
42461+60(#-1)
n+2/63-64
L#ROT01ET
R
ROT01 Elapsed Time
Real
42463+60(#-1)
n+3/61-62
L#ROT01RT R/W
ROT01
Remaining
Time Real
42465+60(#-1)
n+3/63-64
L#DYT02ET
R
DYT02 Elapsed Time
Real
42467+60(#-1)
n/65-66
L#DYT02RT R/W
DYT02 Remaining Time Real
42469+60(#-1)
n/67-68
L#OST02ET
R
OST02 Elapsed Time
Real
42471+60(#-1)
n+1/65-66
L#OST02RT R/W
OST02
Remaining
Time Real
42473+60(#-1)
n+1/67-68
L#RCT02ET
R
RCT02 Elapsed Time
Real
42475+60(#-1)
n+2/65-66
L#RCT02RT
R/W
RCT02 Remaining Time Real
42477+60(#-1)
n+2/67-68
L#ROT02ET
R
ROT02 Elapsed Time
Real
42479+60(#-1)
n+3/65-66
L#ROT02RT R/W
ROT02
Remaining
Time Real
42481+60(#-1)
n+3/67-68
L#DYT03ET
R
DYT03 Elapsed Time
Real
42483+60(#-1)
n/69-70
L#DYT03RT R/W
DYT03 Remaining Time Real
42485+60(#-1)
n/71-72
L#OST03ET
R
OST03 Elapsed Time
Real
42487+60(#-1)
n+1/69-70
L#OST03RT R/W
OST03
Remaining
Time Real
42489+60(#-1)
n+1/71-72
L#RCT03ET
R
RCT03 Elapsed Time
Real
42491+60(#-1)
n+2/69-70
L#RCT03RT
R/W
RCT03 Remaining Time Real
42493+60(#-1)
n+2/71-72
L#ROT03ET
R
ROT03 Elapsed Time
Real
42495+60(#-1)
n+3/69-70
L#ROT03RT R/W
ROT03
Remaining
Time Real
42497+60(#-1)
n+3/71-72
(spares)
42499-42509+60(#-1)
* In addition to the timers listed here the LIL will map 1 through 21 (see LIL overview for exact locations).
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Summary of Contents for Moore 353
Page 2: ...S t o c k C h e c k c o m ...
Page 14: ...Contents UM353 1 xii March 2003 S t o c k C h e c k c o m ...
Page 24: ...Introduction UM353 1 March 2003 1 10 S t o c k C h e c k c o m ...
Page 152: ...LonWorks Communications UM353 1 March 2003 5 4 S t o c k C h e c k c o m ...
Page 164: ...Network Communications UM353 1 6 12 March 2003 S t o c k C h e c k c o m ...
Page 246: ...Operation UM353 1 March 2003 9 8 S t o c k C h e c k c o m ...
Page 254: ...Controller and System Test UM353 1 March 2003 10 8 S t o c k C h e c k c o m ...
Page 282: ...Circuit Description UM353 1 March 2003 13 4 S t o c k C h e c k c o m ...
Page 298: ...Model Designation and Specifications UM353 1 March 2003 14 16 S t o c k C h e c k c o m ...
Page 302: ...Abbreviations And Acronyms UM353 1 15 2 March 2003 S t o c k C h e c k c o m ...
Page 304: ...Warranty UM353 1 W 2 March 2003 S t o c k C h e c k c o m ...