Hardware description
10.4 Input/output address areas
SIMATIC IPC127E
80
Operating Instructions, 01/2019, A5E44296915-AA
Bit
Range
Default &
Access
Field Name (ID): Description
3
0h
RW/1C/V
Timeout (tco-timeTCOout): Bit set to 1 by PMC to indicate that the SMI was
caused by TCO timer reaching 0. Reset: On cold boot, cold reset, warm
reset, and Sx.
2:0
0h
RO
Reserved (rsvd): Reserved.
TCO Timer Control (TCO1_CNT) - Offset 68h
Bit
Range
Default &
Access
Field Name (ID): Description
31:22
0h
RO
Reserved (rsvd): Reserved.
21:20
0h
RW
OS Policy (os-policy): OS-based software writes to these bits to select the
policy that BIOS will use after the platform resets due to the WDT. The fol-
lowing convention is recommended for the BIOS and OS:
00: Boot normally
01: Shut down
10: Don't load OS. Hold in pre-boot state and use LAN to determine next
step.
11: Reserved
Reset on RSM_RST_N de-assertion only.
19:13
0h
RO
Reserved (reserved2): Reserved.
12
0h
RW/L
TCO Lock (tco_lock): When set to 1, this bit prevents writes from changing
the TCO_EN bit (in offset 30h of Power Management I/O space). Once this
bit is set to 1, it cannot be cleared by software writing a 0 to this location.
Reset is required to change this from 1 to 0. This bit defaults to 0. On some
prior platforms, this field is reset on cold reset. This is reset on cold boot, cold
reset, warm reset, and Sx.
11
0h
RW
TCO Timer Halt (tco_tmr_halt):
1: The TCO Timer will halt. It will not count, and thus cannot reach a value
that would cause an SMI# or cause the SECOND_TO_STS bit to be set. This
will also prevent rebooting.
0: The TCO timer is enabled to count. This is the default. This is reset on
cold boot, cold reset, warm reset, and Sx.
10:0
0h
RO
Reserved (reserved1): Reserved.
