Link-up and update
8.3 Time monitoring
CPU 410-5H Process Automation
128
System Manual, 09/2014, A5E31622160-AB
Calculating the maximum inhibit time for priority classes > 15 (T
P15
)
The maximum inhibit time for priority classes > 15 is determined by 4 main factors:
●
As shown in Figure 12-2, all the contents of data blocks modified since last copied to the
standby CPU are once again transferred to the standby CPU on completion of the
update. The number and structure of the DBs you write to in the high-priority classes is a
decisive factor in the duration of this operation, and thus in the maximum inhibit time for
priority classes > 15. Relevant information is available in the remedies described below.
●
In the final update phase, all OBs are either delayed or inhibited. To avoid any
unnecessary extension of the maximum inhibit time for priority classes > 15 due to
unfavorable programming, you should always process the time-critical I/O components in
a selected cyclic interrupt. This is particularly relevant in fail-safe user programs. You can
define this cyclic interrupt in your configuration. It is then executed again right after the
start of the maximum inhibit time for priority classes > 15, provided you have assigned it a
priority class > 15.
●
In link-up and update operations with master/standby changeover (see section Link-up
sequence (Page 287)), you also need to changeover the active communication channel
on the switched DP slaves and switched IO devices on completion of the update. This
operation prolongs the time within which valid values can neither be read nor output. How
long this process takes is determined by your hardware configuration.
●
The technological conditions in your process also decide how long an I/O update can be
delayed. This is particularly important in time-monitored processes in fail-safe systems.
Note
For details, refer to Manual
S7-400F and S7-400FH Automation Systems and Manual S7-
300 Automation Systems, Fail-safe Signal Modules. This applies in particular to the
internal execution times of fail-safe modules.
1.
Based on the bus parameters in STEP 7, determine the following for each DP master
system:
–
T
TR
for the DP master system
–
DP changeover time (referred to below as T
DP_UM
)
2.
From the STEP 7 configuration, determine the following for each IO subsystem:
–
Maximum update time of the IO subsystem (referred to below as T
max_Akt
)
–
PN changeover time (referred to below as T
PN_UM
)
3.
Based on the technical data of the switched DP slaves, determine the following for each
DP master system:
–
The maximum changeover time of the active communication channel
(referred to below as T
SLAVE_UM
).
4.
Based on the technical specifications of the switched PN devices, determine the following
for each IO subsystem:
–
Maximum changeover time of the active communication channel (referred to below as
T
Device_UM
).
