Introduction to STEP 5
S5-95F
Calculating the Maximum Response Time of the External I/Os
Figure 7-12 shows a schematic of the S5-95F program processing.
Figure 7-12. Response Time of the External I/Os (Worst Case)
a a a a a a a a
a a a a a a a a
a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
a a a a a a a a a a a a a a
Delay time of
the onboard DI
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
Program
processing
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
Program
processing
a a a a a a
a a a a a a
a a a a a a
a a a a a a
a a a a a a
ExP2
a a a
a a a
a a a
a a a
...
a a a a a a
a a a a a a
a a a a a a
a a a a a a
ExP3
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
OBP
read2
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
OBP
write2
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
OBP
read3
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
OBP
write3
a a
a a
a a
a a
a a
t
...
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
ExP:
Data cycle of the external I/Os
Besy:
Operating system
OBP
read
: Read cycle of the onboard I/Os
OBP
write
: Write cycle of the onboard I/Os
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a
Input signal changes;
signal change is not yet
recognized during ExP1
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
Input signal change
is recognized during ExP2
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
Response to input
signal change during ExP3
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
Program
processing
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
OBP
read4
...
Besy
Besy
a a a a a a
a a a a a a
a a a a a a
a a a a a a
a a a a a a
ExP1
You calculate the maximum response time T
OB1 response
with cyclical program processing via the
external I/Os as follows:
T
OB1 response, ExP
=
2 x program processing time
+ 2 x operating system runtime (80 ms)*
+ 1 x data cycle time of the external I/Os (max. 7 ms)
+ 1 x delay time of the input modules (5 ms)
Expressed in OB1 cycles, the following applies:
T
OB1 reponse, ExP
=
2 x OB1 cycle time
+ 1 x delay time of the input modules (5 ms)
+ 1 x data cycle time of the external I/Os (max. 7 ms)
The integrated cycle time statistics (see section 15.7) are an aid enabling you to initially assess the
cycle time
Extension of the Response Time through STATUS Programmer Function
Note
During the STATUS programmer function, the S5-95F processes the blocks in a special
mode; the runtime of the blocks increases considerably and is command-dependent.
Please note that this also results in an increase in the response time. Therefore program
your blocks as short as possible.
* Times increase in the case of loading through interrupts or programmer operation (see section 7.4.2)..
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EWA 4NEB 812 6210-02
