S5-95F
Introduction to STEP 5
7.4.3
Maximum Response Time with Cyclical Program Processing
The reaction to a change in the input signal is a change in the output signal. The time between the
change in the input signal and the change in the output signal is called response time.
To determine the response time, you must know the following times:
•
Program processing time
•
Operating system runtime including the read and write cycle times of the on-board I/Os
(t
Besy
80 ms)*
•
Data cycle times of the external I/Os (number of data bits x 25
µ
s)
•
Delay time of the input modules ( 5 ms)
Calculating the Maximum Response Time for the Onboard I/Os
Figure 7-11 shows a schematic of the S5-95F program processing.
Figure 7-11. Response Time of the Onboard I/Os (Worst Case)
a a a a a a a a
a a a a a a a a
a a a a a a a a
a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a
Delay time of the
onboard DI
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
Program
processing
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
Program
processing
a a a a a
a a a a a
a a a a a
a a a a a
a a a a a
ExP
a a a
a a a
a a a
a a a
...
a a a a a
a a a a a
a a a a a
a a a a a
ExP
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
OBP
read1
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
OBP
write1
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
OBP
read2
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
OBP
write2
a a
a a
a a
a a
t
...
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a a
ExP:
Data cycle of external I/Os
Besy:
Operating system
OBP
read
: Read cycle of the onboard I/Os
OBP
write
: Read cycle of the onboard I/Os
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
Input signal changes;
signal change is not
yet recognized
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a
Input signal change
is recognized during
OBP
read2
a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a a a a a
Response to input signal
change during OBP
write2
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
a a a a a a a a a a a
Program
processing
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
a a a a a a a a a a
OBP
read3
...
Besy
Besy
You calculate the maximum response time T
OB1 response, OBP
with cyclical program processing via
the onboard I/Os as follows:
T
OB1 response, OBP
=
2 x program processing time
+1 x operating system runtime (80 ms)*
+1 x delay time of the input modules (5 ms)
Expressed in OB1 cycles, the following applies:
T
OB1 reponse, OBP
=
2 × OB1 cycle time
- 1 x operating system runtime (80 ms)*
+ 1 x delay time of the input modules (5 ms)
=
2×OB1 cycle time - 75 ms*
The integrated cycle time statistics (see section 15.7) are an aid enabling you to initially assess the
cycle time.
* Times increase in the case of loading through interrupts or programmer operation (see section 7.4.2).
EWA 4NEB 812 6210-02
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