C8051F35x-DK
Rev. 0.1
7
6.3. Expansion I/O Connector (J1)
The 34-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F350 device. Pins for V
DD
and
GND as well as pins for VDDA and AGND are also available. A small through-hole prototyping area is also provided.
All I/O signals routed to connector J1 are also routed to through-hole connection points between J1 and the prototyp-
ing area (see Figure 2 on page 5). Each connection point is labeled indicating the signal available at the connection
point. See Table 2 for a list of pin descriptions for J1.
6.4. Target Board DEBUG Interface (J4)
The DEBUG connector (J4) provides access to the DEBUG (C2) pins of the C8051F350. It is used to connect the
Serial Adapter to the target board for in-circuit debugging and Flash programming. Table 3 shows the DEBUG pin
definitions.
Pin #
Description
Pin #
Description
Pin #
Description
1
V
DD
13
P1.2
25
AIN3
2
GND
14
P1.3
26
AIN4
3
P0.0
15
P1.4
27
AIN5
4
P0.1
16
P1.5
28
AIN6
5
P0.2
17
P1.6/IDAC0
29
AIN7
6
P0.3
18
P1.7/IDAC1
30
VREF+
7
P0.4
19
P2.0
31
/RST
8
P0.5
20
AGND
32
VREF-
9
P0.6
21
AGND
33
VDDA
10
P0.7
22
AIN0
34
AGND
11
P1.0
23
AIN1
-
-
P1.1
24
AIN2
-
-
Table 2. J1 Pin Descriptions
Pin #
Description
1
+3 VD (+3.3 VDC)
2, 3, 9
GND (Ground)
4
C2DAT
5
/RST (Reset)
6
P3.0
7
C2CK
8
Not Connected
10
J4_Pin_10
Table 3. DEBUG Connector Pin Descriptions
