C8051F500DK
Rev. 0.1
15
8.12. Potentiometer (J20)
The C8051F500 (Side A) device has the option to connect port pin P1.2 to 10K linear potentiometer. The
potentimeter is connected through the J20 header. The potentiometer can be used for testing the analog-to-digital
(ADC) converter of the MCU.
8.13. Power Supply I/O (Side A) (TB3)
All of the C8051F500 target device’s supply pins are connected to the TB3 terminal block. Refer to Table 10 for the
TB3 terminal block connections.
8.14. C2 Pin Sharing
On the C8051F500 (Side A), the debug pin C2CK is shared with the /RST pin. On the C8051F502 (Side B), the
debug pins C2CK and C2D are shared with the pins /RST and P3.0 respectively. The target board includes the
resistors necessary to enable pin sharing which allow the pin–shared pins (/RST and P3.) to be used normally
while simultaneously debugging the device. See Application Note “AN124: Pin Sharing Techniques for the C2
Interface” at
www.silabs.com
for more information regarding pin sharing.
Table 10. TB1 Terminal Block Pin Descriptions
Pin #
Description
1
VIO_A
2
VREGIN_A
3
VDD_A
4
VDDA_A
5
GNDA_A
6
GND
Summary of Contents for C8051F500
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