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C8051F500DK

6

Rev. 0.1

6.2.  Building and Downloading the Program for Debugging

1. Once all source files have been added to the target build, build the project by clicking on the 

Build/Make

Project 

button in the toolbar or selecting 

Project

Build/Make Project 

from the menu.

Note:

 After the project has been built the first time, the 

Build/Make Project

 command will only build the 

files that have been changed since the previous build. To rebuild all files and project dependencies, click 
on the 

Rebuild All

 button in the toolbar or select 

Project

Rebuild All

 from the menu.

2. Before connecting to the target device, several connection options may need to be set. Open the

Connection Options

 window by selecting 

Options

Connection Options...

 in the IDE menu. First, select

the appropriate adapter in the “Serial Adapter” section. Next, the correct “Debug Interface” must be selected.
C8051F50x family devices use the Silicon Labs 2-wire (C2) debug interface. Once all the selections are made,
click the OK button to close the window. 

3. Click the 

Connect

 button in the toolbar or select 

Debug

Connect

 from the menu to connect to the device. 

4. Download the project to the target by clicking the 

Download

 

Code

 button in the toolbar.

Note:

 To enable automatic downloading if the program build is successful, select 

Enable automatic 

connect/download after build

 in the 

Project

Target Build Configuration

 dialog. If errors occur during 

the build process, the IDE will not attempt the download.

5. Save the project when finished with the debug session to preserve the current target build configuration,

editor settings and the location of all open debug views. To save the project, select 

Project

Save Project

As...

 from the menu. Create a new name for the project and click on 

Save

.

7.  Example Source Code

Example source code and register definition files are provided in the “

SiLabs\MCU\Examples\C8051F50x_1x\

directory during IDE installation. These files may be used as a template for code development. Example
applications include a blinking LED example which configures the green LED on the target board to blink at a fixed
rate.

7.1.  Register Definition Files

Register definition files 

C8051F500.inc and C8051F500_defs.h 

define all SFR registers and bit-addressable

control/status bits. A macro definition header file 

compiler_defs.h

 is also included, and is required to be able to use

the 

C8051F500_defs.h

 header file with various tool chains. These files are installed into the

SiLabs\MCU\Examples\C8051F50x_1x\Header_Files\

” directory during IDE installation by default. The register

and bit names are identical to those used in the C8051F50x data sheet. These register definition files are also
installed in the default search path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051 tools
included with the development kit (A51, C51), it is not necessary to copy a register definition file to each project’s
file directory.

7.2.  Blinking LED Example

The example source files 

F500_Blinky.asm

 and 

F500_Blinky.c

 installed in the default directory

SiLabs\MCU\Examples\C8051F50x_1x\Blinky

” show examples of several basic C8051F500 functions. These

include disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt
routine, initializing the system clock, and configuring a GPIO port pin. When compiled/assembled and linked, this
program flashes the green LED on the C8051F500 target board about five times a second using the interrupt
handler with a C8051F500 timer.

Summary of Contents for C8051F500

Page 1: ...8051Fxxx Development Kit Quick Start Guide Silicon Laboratories IDE and Product Information CD ROM CD content includes Silicon Laboratories Integrated Development Environment IDE Keil 8051 Development Tools macro assembler linker evaluation C compiler Source code examples and register definition files Documentation C8051F500 Development Kit User s Guide this document AC to DC Power Adapter USB Deb...

Page 2: ...eviously installed CP210x Virtual COM Port drivers It will let you know when your system is up to date The driver files included in this installation have been certified by Microsoft 4 If the Launch the CP210x VCP Driver Installer option was not selected in step 3 the installer can be found in the location specified in step 2 by default C SiLabs MCU CP210x Windows_2K_XP_S2K3_Vista At this location...

Page 3: ...fer to the Application Note AN104 Integrating Keil Tools into the Silicon Labs IDE for instructions to change the limitation to 4 kB and have the programs start at code address 0x0000 4 3 Configuration Wizard 2 The Configuration Wizard 2 is a code generation tool for all of the Silicon Laboratories devices Code is generated through the use of dialog boxes for each of the device s peripherals Figur...

Page 4: ...onnection is to DEBUG_A as this microcon troller is the primary MCU on the board and more peripherals are easily available 2 Connect one end of the USB cable to the USB connector on the USB Debug Adapter 3 Connect the other end of the USB cable to a USB Port on the PC 4 Connect the AC DC power adapter to power jack P4 on the target board Notes Use the Reset button in the IDE to reset the target wh...

Page 5: ...ith one or more source files build a program and download the program to the target in preparation for debugging The IDE will automatically create a single file project using the currently open and active source file if you select Build Make Project before a project is defined 6 1 Creating a New Project 1 Select Project New Project to open a new project and reset all configuration settings to defa...

Page 6: ...oject select Project Save Project As from the menu Create a new name for the project and click on Save 7 Example Source Code Example source code and register definition files are provided in the SiLabs MCU Examples C8051F50x_1x directory during IDE installation These files may be used as a template for code development Example applications include a blinking LED example which configures the green ...

Page 7: ...18 Side A Connects VIO to VIO_A_SRC which powers the P1 2 potentiometer the RST_A pin pull up and P1 4_A Switch pull up J19 Side A Connects P1 3_A LED and P1 4_A Switch to MCU port pins J20 Side A Connects R27 potentiometer to port pin 1 2 J21 Connect V_HIGH node from TB1 LIN header to 5V regulator input for board power J22 Side A Connects decoupling capacitors C28 and C29 for MCU VREF P0 0 J24 Si...

Page 8: ...2 A J3 Port 1 A J2 Port 3 A J4 LIN_V LIN_OUT GND DEBUG_A P2 CAN_H CAN_L GND R27 SIDE A SIDE B DEBUG_B P3 TB3 RESET_A RESET_B J20 SILICON LABS www silabs com DS4 DS2 DS3 DS1 J14 J22 J19 J18 J21 J7 J10 J9 J24 J17 Port 0 B J27 Port 2 B J29 Port 1 B J28 J11 F502 U2 C8051 F500 U1 J31 J32 J8 J26 U5 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 1 2 1 2 2 2 2 2 2 2 2 2 2 2 1 TB1 TB2 ...

Page 9: ...gure 4 C8051F500 Target Board Shorting Blocks Factory Defaults P4 P1 C8051F500 TB PWR COMM P1 3_A P1 3_B P1 4_B P1 4_A P1 Port 0 A J1 Port 4 A J5 Port 2 A J3 Port 1 A J2 Port 3 A J4 LIN_V LIN_OUT GND DEBUG_A P2 CAN_H CAN_L GND R27 SIDE A SIDE B DEBUG_B P3 TB3 RESET_A RESET_B J20 SILICON LABS www silabs com DS4 DS2 DS3 DS1 J14 J22 J19 J18 J21 J7 J10 J9 J24 J17 Port 0 B J27 Port 2 B J29 Port 1 B J28...

Page 10: ...ternal Oscillators The C8051F500 and C8051F502 devices installed on the target board feature a factory calibrated programmable high frequency internal oscillator 24 MHz base frequency 0 5 which is enabled as the system clock source on reset After reset the internal oscillator operates at a frequency of 187 5 kHz by default but may be configured by software to operate at other frequencies The on ch...

Page 11: ...he header J19 Remove the shorting block from the header to disconnect the LED from the port pin Similarly the green LED named P1 3_B is connected to the C8051F502 Side B through the J11 header See Table 1 for the port pins and headers corresponding to each LED 8 5 Target Board Debug Interfaces P2 and P3 The debug connectors P2 DEBUG_A and P3 DEBUG_B provide access to the debug C2 pins of the C8051...

Page 12: ...o the CAN peripheral on each MCU are P0 6 CAN_TX and P0 7 CAN_RX The C8051F500 Side A is connected to U3 through the J17 header and the C8051F502 Side B is connected to U4 through the J26 header The two CAN transceivers are connected to each other and form a CAN network Other external devices can be connected to the CAN network through the TB2 interface The shorting block positions for connecting ...

Page 13: ... If an external voltage source is not provided the LIN transceivers use the 12V provided through the P4 wall wart connector See Section 8 2 for more power option details The shorting block positions for connecting the MCUs to the LIN transceivers are listed in Table 6 The pin connections for the external LIN devices are listed in Table 7 8 9 Port I O Connectors J1 J5 and J27 J29 Each of the parall...

Page 14: ...2 54DS Digi Key part number H5096 ND Table 9 P1 Pin Listing Pin Description Pin Description Pin Description A 1 3 3V B 1 GND C 1 N C A 2 N C B 2 N C C 2 N C A 3 N C B 3 N C C 3 N C A 4 N C B 4 N C C 4 N C A 5 N C B 5 N C C 5 N C A 6 N C B 6 N C C 6 N C A 7 N C B 7 N C C 7 N C A 8 N C B 8 N C C 8 N C A 9 N C B 9 N C C 9 N C A 10 N C B 10 P0 7_A C 10 P0 6_A A 11 P0 5_A B 11 P0 4_A C 11 P_0 3_A A 12 ...

Page 15: ...erminal block connections 8 14 C2 Pin Sharing On the C8051F500 Side A the debug pin C2CK is shared with the RST pin On the C8051F502 Side B the debug pins C2CK and C2D are shared with the pins RST and P3 0 respectively The target board includes the resistors necessary to enable pin sharing which allow the pin shared pins RST and P3 to be used normally while simultaneously debugging the device See ...

Page 16: ...sted below Table 11 summarizes the C8051F500 MCU pin assignments on the target board and also shows the various headers associated with each signal Table 11 C8051F500 Target Board Pin Assignments and Headers MCU Pin Name Pin Primary Function Alternate Fixed Function Target Board Function Relevant Headers P0 0 8 P0 0 VREF VREF J1 1 J22 1 P0 1 1 P0 1 CNVSTR CNVSTR J1 2 P0 2 48 P0 2 XTAL1 XTAL1 J1 3 ...

Page 17: ...J5 7 P4 7 9 P4 7 GPIO J5 8 RST C2CK 12 RST C2CK RST C2CK P2 7 P2 5 C2D 11 C2D C2D P2 4 VIO 2 VIO VIO J24 4 J18 1 TB3 1 J1 J5 9 VREGIN 3 VREGIN VREGIN J24 2 P2 5 TB3 2 VDD 4 VDD VDD TB3 3 VDDA 5 VDDA VDDA TB3 4 GND 6 GND GND J1 J5 10 TB3 6 GNDA 7 GNDA VDD TB3 5 Note Headers denoted by this symbol are not directly connected to the MCU pin the connection might be via one or more headers and or pin sh...

Page 18: ...C8051F500DK 18 Rev 0 1 9 Schematics Figure 5 C8051F502 Target Board Schematic Page 1 of 4 ...

Page 19: ...C8051F500DK Rev 0 1 19 Figure 6 C8051F502 Target Board Schematic Page 2 of 4 ...

Page 20: ...C8051F500DK 20 Rev 0 1 Figure 7 C8051F502 Target Board Schematic Page 3 of 4 ...

Page 21: ...C8051F500DK Rev 0 1 21 Figure 8 C8051F502 Target Board Schematic Page 4 of 4 ...

Page 22: ...y for the functioning of undescribed features or parameters Silicon Laboratories reserves the right to make changes without further notice Silicon Laboratories makes no warranty rep resentation or guarantee regarding the suitability of its products for any particular purpose nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit and speci...

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