C8051F930-DK
12
Rev. 0.5
7. Target Board
The C8051F930 Development Kit includes a target board with a
C8051F930
device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to Figure 7 for the locations of the various I/O connectors. Figure 9 on page 14 shows
the factory default shorting block positions.
P1
Expansion connector (96-pin)
P2
Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
P3
USB connector (connects to PC for serial communication)
J1
Enable/Disable VBAT Power LED
J2, J3, J4
Port I/O headers (provide access to Port I/O pins)
J5
Enable/Disable VDD/DC+ Power LED
J6
Provides an easily accessible ground clip
J7
Connects pin P0.7 (IREF0 Output) to resistor R14 and capacitor C19
J8
Connects P0.2 and P0.3 to switches and P1.5 and P1.6 to LEDs
J9
DEBUG connector for Debug Adapter interface
J10, J11
Selects the power supply source (Wall Power, AAA Battery, or Coin Cell)
J12
Connects Port I/O to UART0 interface
J13
Connects external VREF capacitor to the P0.0/VREF
J14
Connects the PCB ground plane to P0.1/AGND
J15
Connects negative potentiometer (R14) terminal to pin P1.4 or to GND
J16
Connects the potentiometer (R14) wiper to P0.6/CNVSTR
J17
Creates an open in the power supply path to allow supply current measurement
H1
Analog I/O terminal block
H2
Provides terminal block access to the input and output nodes of J17
SW4
Switches the device between One-Cell (0.9–1.8 V supply) or Two-Cell (1.8–3.6 V) mode
SW5
Turns power to the MCU on or off
Figure 7. C8051F930 Target Board
P0.2
P0.3
Pin 1
Pin 2
J3
J4
J2
`
P3
CP
2103
U3
P2
DEBU
G
J9
USB POWER
RESET
P1.6
P1.5
PO
W
E
R
O
F
F
BE
F
O
R
E
SW4
SW
IT
CH
IN
G M
O
D
E
2 CE
LL
1 C
E
LL
J17
IMEASURE
H2
SILICON LABS
www.silabs.com
H1
Pin 1
J6 VDD/DC+
J5
J7
J13
F930
U1
J14
J11
J10
VBAT
WALL_PWR
AAA_BAT
COIN_CELL
TOUCH SENSE SWITCH
P2.0
TOUCH SENSE SWITCH
P2.1
P1.4
J15
GND
J16
R15
J12
J8
+3VD
+1VD
VBAT
J1
SW5
ON
OFF
P1
SW2
SW3
PORT2
PORT1
SW1
PORT0
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