S D B C - D K 3 U G
44
Rev. 0.3
8.1.1. Basic Code Overview
Main
()
(main.c)
Hardware Initialization
MCU hardware, system clock setup, and I/O init
Hardware
SPI
pin
definition (C8051.h)
nSEL and nIRQ pin definition
SPI
read/write
function
protocol
i.e.,
#define SYSCLK (16000000L/2)
#define SPI_CLOCK
(SYSCLK/4)
//RF chip
SBIT(RF_NSEL_PIN, SFR_P1, 3);
SBIT(RF_NIRQ_PIN, SFR_P0, 6);
//SPI port
SBIT(SPI_MISO_PIN, SFR_P1, 1);
SBIT(SPI_MOSI_PIN, SFR_P1, 2);
SBIT(SPI_SCK_PIN, SFR_P1, 0);
Hardware
SPI
setup
(C8051.c)
nSEL and nIRQ pin setup
SPI
read/write
functions
i.e.,
void SetHwMasterSpi(void)
{
SPI1CFG = 0x40;
//Master SPI, CKPHA=0, CKPOL=0
SPI1CN = 0x00;
//3-wire Single Master, SPI enabled
SPI1CKR = (SYSCLK/(2*SPI_CLOCK))-1;
SPI1EN
= 1;
// Enable SPI1 module
//set nSEL pins to high
RF_NSEL_PIN = 1;
}
RF chip hardware and I/O init
RF Parameters definition
(Si4432.h)
i.e.,
//define the default radio frequency
#define FREQ_BAND_SELECT 0x75
//frequency band select
#define NOMINAL_CAR_FREQ1 0xBB
//default carrier frequency: 915 MHz
#define NOMINAL_CAR_FREQ2 0x80
RF hardware setup and parameters setting
(Si4432.c)
i.e.,
// set frequency
SpiRfWriteAddressData((REG_WRITE | FrequencyBandSelect), FREQ_BAND_SELECT);
SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency1), NOMINAL_CAR_FREQ1);
SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency0), NOMINAL_CAR_FREQ2);
RF chip in continuous receive mode
(main.c)
Check incoming data for valet packet
Blink LED for valid packet
Response to Push button command
Send Data Packet out
Summary of Contents for C8051F930
Page 2: ...SDBC DK3 UG 2 Rev 0 3 ...
Page 9: ...SDBC DK3 UG Rev 0 3 9 Figure 5 MSC DBSB8 Schematic 2 of 2 ...
Page 21: ...SDBC DK3 UG Rev 0 3 21 Figure 24 Active Antenna and RSSI Indications ...
Page 23: ...SDBC DK3 UG Rev 0 3 23 Figure 26 Lab Equipment Connection Diagram ...
Page 75: ...SDBC DK3 UG Rev 0 3 75 NOTES ...
