S D B C - D K 3 U G
60
Rev. 0.3
RF_NSEL_PIN = 1;
// initialize I/O port directions
ItStatus1 = SpiRfReadRegister(InterruptStatus1);
// read interrupt status
ItStatus2 = SpiRfReadRegister(InterruptStatus2);
// SW reset -> wait for POR interrupt
SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x80);
// Enable the POR interrupt
while ( RF_NIRQ_PIN == 1);
// Wait for the POR interrupt
// disable all ITs, except 'ichiprdy'
SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x00);
SpiRfWriteAddressData((REG_WRITE | InterruptEnable2), 0x02);
ItStatus1
=
SpiRfReadRegister(InterruptStatus1);
ItStatus2
=
SpiRfReadRegister(InterruptStatus2);
// set the non-default Si4432 registers
// set VCO
SpiRfWriteAddressData((REG_WRITE | VCOCurrentTrimming), 0x7F);
SpiRfWriteAddressData((REG_WRITE | DividerCurrentTrimming), 0x40);
// set the AGC
SpiRfWriteAddressData((REG_WRITE | AGCOverride2), 0x0B);
// set ADC reference voltage to 0.9V
SpiRfWriteAddressData((REG_WRITE | DeltasigmaADCTuning2), 0x04);
The default value on power up should be able to oscillate the crystal.
Based on the crystal and PCB capacitance, these cap banks can be used to
tune the TX/RX offset.
// set cap. bank
SpiRfWriteAddressData((REG_WRITE | CrystalOscillatorLoadCapacitance), 0xD7);
// reset digital testbus, disable scan test
SpiRfWriteAddressData((REG_WRITE | DigitalTestBus), 41);//0x00);
// select nothing to the Analog Testbus
SpiRfWriteAddressData((REG_WRITE | AnalogTestBus), 0x0B);
Important: The band selector command (Configuration Command) should
be sent prior to the receiver command since once band selection has been
achieved, the synthesizer should be calibrated. Calibration can be done by
turning off and on the receiver chain using the receiver command. In the
current application the receiver chain is continuously turned on.
// set frequency
SpiRfWriteAddressData((REG_WRITE | FrequencyBandSelect), FREQ_BAND_SELECT);
SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency1), NOMINAL_CAR_FREQ1);
SpiRfWriteAddressData((REG_WRITE | NominalCarrierFrequency0), NOMINAL_CAR_FREQ2);
// disable RX-TX headers,
SpiRfWriteAddressData((REG_WRITE | HeaderControl1), 0x00 );
SpiRfWriteAddressData((REG_WRITE | HeaderControl2), 0x02 );
// set the sync word
Summary of Contents for C8051F930
Page 2: ...SDBC DK3 UG 2 Rev 0 3 ...
Page 9: ...SDBC DK3 UG Rev 0 3 9 Figure 5 MSC DBSB8 Schematic 2 of 2 ...
Page 21: ...SDBC DK3 UG Rev 0 3 21 Figure 24 Active Antenna and RSSI Indications ...
Page 23: ...SDBC DK3 UG Rev 0 3 23 Figure 26 Lab Equipment Connection Diagram ...
Page 75: ...SDBC DK3 UG Rev 0 3 75 NOTES ...
