C 8 0 5 1 F 9 9 x
18
Rev. 0.2
5.10. IREF Connector (J7)
The C8051F996 Target Board also features a current-to-voltage 1 k
load resistor that may be connected to the
current reference (IREF0) output that can be enabled on port pin (P0.7). Install a shorting block on J7 to connect
port pin P0.7 of the target device to the load resistor. If enabled by software, the IREF0 signal is then routed to the
J2[8] and TB1[2] connectors.
5.11. VREF and AGND Connector (J13, J14)
The C8051F996 Target Board also features 4.7 µF capacitor in parallel with a 0.1 µF that can be connected to
P0.0/VREF when using an external reference. The capacitors are connected to P0.0/VREF when a shorting block
is installed on J13. Using an external reference is optional since C8051F99x/98x devices have an on-chip High-
Speed Voltage Reference.
A shorting block on J14 allows P0.1/AGND to be connected to ground. This provides a noise-free ground reference
to the analog-to-digital Converter. The use of this dedicated analog ground is optional.
5.12. C2 Pin Sharing
On the C8051F996, the debug pins C2CK and C2D are shared with the pins RST and P2.7, respectively. The
target board includes the resistors necessary to enable pin sharing which allow the RST and P2.7 pins to be used
normally while simultaneously debugging the device. See Application Note “AN124: Pin Sharing Techniques for the
C2 Interface” at www.silabs.com for more information regarding pin sharing.
Summary of Contents for C8051F983-GM
Page 19: ...C8051F99x Rev 0 2 19 6 Schematics Figure 11 C8051F996 Target Board Schematic 1 of 3 ...
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Page 22: ...C8051F99x 22 Rev 0 2 NOTES ...
