Silicon Laboratories CP250 Series User Manual Download | Manualshive

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C P 2 5 0 1 - D K

2

Rev. 0.1

Figure 1. Hardware Setup

U1

F326

CP250x-MB

SILICON LABS

www.silabs.com

P5

J3

+3VD

VDD_PWR

VDD_DEBUG

RESET

TB3

TB1

TB2

P3

J15

VPP

J7

J13

J1

J2

P2

P1

D10

D11

D12

SPI_SCLK

SPI_MISO

SPI_MOSI

SPI_NSS

GND

UART_RX

UART_TX

GND

SMBUS_SDA

SMBUS_SCL

GND

USB Cable

Place shorting blocks on

J3 and J7 as shown.

U1

CP

2501

CP2501-GM EDB

SILICON LABS

www.silabs.com

P3

J1

VDD

VREGIN

VBUS

AC Adapter

PWR

H1

GPIO7-0

H2

GPIO15-8

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Summary of Contents for CP250 Series

Page 1: ...mentation AC to DC universal power adapter Two USB cables 2 Hardware Setup See Figure 1 for a diagram of the hardware configuration 1 Attach the daughter board to the motherboard at connectors P1 and P2 2 Place shorting blocks on J7 and J3 3VD VDD_PWR as shown in Figure 1 3 Connect the motherboard s P5 USB connector to a PC using the USB Cable 4 Connect the ac to dc power adapter to connector P3 o...

Page 2: ...EBUG RESET TB3 TB1 TB2 P3 J15 VPP J7 J13 J1 J2 P2 P1 D10 D11 D12 SPI_SCLK SPI_MISO SPI_MOSI SPI_NSS GND UART_RX UART_TX GND SMBUS_SDA SMBUS_SCL GND USB Cable Place shorting blocks on J3 and J7 as shown U1 CP 2501 CP2501 GM EDB SILICON LABS www silabs com P3 J1 VDD VREGIN VBUS AC Adapter PWR H1 GPIO7 0 H2 GPIO15 8 ...

Page 3: ...IDE and the 8051 Evaluation Toolset See Section 4 for an overview of all applicable software included on the CD ROM 4 Installers selected in Step 3 will execute in sequence prompting the user as they install programs documentation and drivers 4 Software Overview The following software is necessary to build a project download code to and communicate with the target microcontroller 8051 Evaluation T...

Page 4: ...ic con nect download after build in the Project Target Build Configuration dialog If errors occur during the build process the IDE will not attempt the download 8 Click on the Go button green circle in the toolbar or by selecting Debug Go from the menu to start run ning the firmware 9 Connect the USB connector on the daughter board to a Windows Vista or Windows 7 PC that supports HID touchscreens ...

Page 5: ...lerate development by automatically generating initialization source code to configure and enable the on chip resources needed by most design projects In just a few steps the wizard creates complete firmware that will enumerate over USB as a HID touch screen device The program is configurable to output projects for Raisonance SDCC and Keil For more information refer to the AN464 CP250x Programmer ...

Page 6: ...he available CP250x daughter board CP250x Motherboard P1 P2 Daughter board connection P3 Power connector that accepts input from 7 5 V dc to 15 V dc unregulated power adapter P5 USB Debug interface connector H1 GPIO 7 0 header H2 GPIO 15 8 header J1 SMBus Pull up Resistor Power Header J2 UART Connection to Debug Adapter J3 Power Supply Selection Header J7 Power supply enable header that connects p...

Page 7: ...Board U1 F326 CP250x MB SILICON LABS www silabs com P5 J3 3VD VDD_PWR VDD_DEBUG RESET TB3 TB1 TB2 P3 J15 VPP J7 J13 J1 J2 P2 P1 D10 D11 D12 SPI_SCLK SPI_MISO SPI_MOSI SPI_NSS GND UART_RX UART_TX GND SMBUS_SDA SMBUS_SCL GND PWR H1 H2 GPIO7 0 GPIO15 8 U1 CP 2501 CP2501 GM EDB SILICON LABS www silabs com P3 J1 VDD VREGIN VBUS ...

Page 8: ... regulator or P3 and its associated circuitry To select a power supply place a shorting block on J3 across the appropriate pin pair as shown in Figure 5 To connect the main power supply to an attached daughter board place a shorting block across J7 Notes 1 Only two of the pins on the J3 header should be connected at any one time 2 To use the USB debug device s voltage regulator as the board s powe...

Page 9: ...50x Motherboard routes the CP250x s UART_TX and UART_RX pins to J2 where those signals can be optionally connected to TB1 header 5 5 SMBus Communications Interface TB2 J1 The CP250x Motherboard connects the SMBus interface pins SMBUS_SDA and SMBUS_SCL to the TB2 header These two pins can be pulled up to the VIO net through the two pull up resistors R1 and R2 by adding the shorting block to the J1 ...

Page 10: ...CP2501 DK 10 Rev 0 1 6 Schematics Figure 6 CP250x Motherboard Schematic 1 of 2 ...

Page 11: ...CP2501 DK Rev 0 1 11 Figure 7 CP250x Motherboard Schematic 2 of 2 ...

Page 12: ...CP2501 DK 12 Rev 0 1 Figure 8 CP2501 Development Daughter Board Schematic ...

Page 13: ...CP2501 DK Rev 0 1 13 NOTES ...

Page 14: ...ies assumes no responsibility for the functioning of undescribed features or parameters Silicon Laboratories reserves the right to make changes without further notice Silicon Laboratories makes no warranty rep resentation or guarantee regarding the suitability of its products for any particular purpose nor does Silicon Laboratories assume any liability arising out of the application or use of any ...

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