CP2501-DK
Rev. 0.1
9
5.3. USB Debug Device (DEBUG/P5)
A universal serial bus (USB) connector (P5) provides the onboard debug and programming interface. The debug/
programming MCU and associated circuitry are powered through the USB connector, which can also supply the
rest of the motherboard by routing the USB debug device’s power through J3. The USB debug device also
provides a data communications interface that can be used when the debug adapter is not debugging or
programming a CP250x device.
5.4. UART Communications Interfaces (TB1, J2)
The CP250x Motherboard provides UART to USB communications interfaces through both the TB1 interface and
the communications interface of the USB Debug Adapter. Any external touch screen module using the UART
interface can connect to the CP250x through either header.
The USB debug device’s communications interface connects to a PC through P5. Access to the USB debug
device’s communications interface is provided by the Windows program called “ToolStick Terminal”, which is
available for download for free from the Silicon Laboratories website. See the ToolStick Terminal help file for
information on how to use ToolStick Terminal.
The CP250x Motherboard routes the CP250x’s UART_TX and UART_RX pins to J2, where those signals can be
optionally connected to TB1 header.
5.5. SMBus Communications Interface (TB2, J1)
The CP250x Motherboard connects the SMBus interface pins SMBUS_SDA and SMBUS_SCL to the TB2 header.
These two pins can be pulled up to the VIO net through the two pull-up resistors, R1 and R2, by adding the shorting
block to the J1 header. Only one set of pull-up resistors is required on any SMBus network. The shorting block on
the J1 header should be removed if the pull-up resistors are already present on the network.
The R1 and R2 pull-up resistors are 1K resistors and are located on the backside of the mother board near the TB2
header.
5.6. SPI Communications Interfaces (TB3)
The CP250x Motherboard connects the SPI interface pins, SPI_SCLK, SPI_MISO, SPI_MOSI, and SPI_NSS to
the TB3 header.
5.7. GPIO Interfaces (H1, H2)
The CP2501 devices support 16 GPIO pins (GPIO0 through GPIO15). These GPIO pins are connected to the two
headers H1 and H2.
5.8. Daughter Board (P3, J1)
The P3 header on the daughter board is the USB connection for the CP2501. The J3 header selects how the
CP2501 on the daughter board is powered. If a shorting block is connected to J1[VBUS-VREGIN], the CP2501 is
powered from the P3 USB connector. If a shorting block is connected to J1[VDD-VREGIN], the CP2501 is powered
from the motherboard.
Summary of Contents for CP250 Series
Page 10: ...CP2501 DK 10 Rev 0 1 6 Schematics Figure 6 CP250x Motherboard Schematic 1 of 2 ...
Page 11: ...CP2501 DK Rev 0 1 11 Figure 7 CP250x Motherboard Schematic 2 of 2 ...
Page 12: ...CP2501 DK 12 Rev 0 1 Figure 8 CP2501 Development Daughter Board Schematic ...
Page 13: ...CP2501 DK Rev 0 1 13 NOTES ...
