11.5.9 RTCC_IFC - Interrupt Flag Clear Register
Offset
Bit Position
0x020
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
0
0
0
Access
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
(R)W1
Name
EFM32JG1 Reference Manual
RTCC - Real Time Counter and Calendar
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