D
Q
Address/Data Bus
Address Bus
EMIF
A[15:8]m
AD[7:0]m
WRb
RDb
ALEm
4K X 8
SRAM
OE
WE
I/O[7:0]
74HC373
A[15:8]
A[7:0]
CE
V
DD
8
(Optional)
Figure 18.3. Multiplexed to Non-Multiplexed Configuration Example
18.3.4 Operating Modes
The external data memory space can be configured in one of four operating modes based on the EMIF Mode bits in the EMI0CF regis-
ter. These modes are as follows:
• Internal Only
• Split Mode without Bank Select
• Split Mode with Bank Select
• External Only
Timing diagrams for the different modes can be found in the
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
On-Chip XRAM
Off-Chip Memory
Off-Chip Memory
Off-Chip Memory
On-Chip XRAM
0xFFFF
0x0000
Internal Only
0xFFFF
0x0000
Split Mode without
Bank Select
0xFFFF
0x0000
0xFFFF
0x0000
Split Mode with
Bank Select
External Only
Figure 18.4. EMIF Operating Modes
EFM8SB2 Reference Manual
External Memory Interface (EMIF0)
silabs.com
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