Appendix 4. Transmission Line (Tline) Match for Minimal BOM Solutions (U.S. Patent US9780757B1)
An alternative low-cost matching technique involves replacing some lumped elements with distributed elements, which saves the cost
of the deleted SMD elements. In this regard, replacing the more expensive high-Q series inductors is desirable. The second reason for
eliminating or replacing the higher-priced high-Q series inductors is the additional losses they introduce, especially when they are used
in the series arm of a K-ladder filter configuration.
The Q of the SMD capacitors is much higher, and their price is much lower, which, in turn, renders their replacement less important.
Together with the optimized Vdd and dc-dc converter filtering, this matching concept is used in the low-cost, minimal BOM 2.4 GHz
reference designs, which can be found on the Silicon Labs Website and described in detail in
AN933: EFR32 Minimal BOM
.
SMD capacitors have an inherent series self-resonance as indicated by the equivalent circuit described in
3.4 Design with Parasitics
and Losses
. The self-resonance frequency is determined by the parasitic inductance. In other words, by the internal electrode structure
and geometry. As the structure and geometry are quite fixed, the self-resonant frequency is also quite stable. Variation is caused mainly
by the capacitance change and, therefore, has the same spreading properties.
As a result of the low impedance of the series self-resonance, a parallel-connected capacitor behaves as a second order notch filter
around its resonant frequency. If choosing a cap value as such, the self-resonance falls close to the most critical harmonic frequency
(usually the second) and an additional 25–35 dB suppression can be achieved.
Figure 4.1 Effect of a Shunt SMD Capacitor Self-Reso-
nating Close to the Second Harmonic on page 28
part a. shows the basic concept of this approach with one 2 pF SMD capacitor (S-
parameters of the GRM155 type, 0402 size SMD capacitor from Murata is used here) denoted by C0. In the simulation stage, shown in
Figure 4.1 Effect of a Shunt SMD Capacitor Self-Resonating Close to the Second Harmonic on page 28
part a., the L0 and C1 ele-
ments are disabled and have no effect on the results. Also, the effect of the short series transmission line to the 50 Ω port is negligible
compared to the impact of C0.
a)
b)
Figure 4.1. Effect of a Shunt SMD Capacitor Self-Resonating Close to the Second Harmonic
The transfer characteristic is shown in
Figure 4.1 Effect of a Shunt SMD Capacitor Self-Resonating Close to the Second Harmonic on
page 28
part b. As shown, the capacitive self-resonance causes significant attenuation at the second harmonic frequency but has some
attenuation at the third harmonic frequency as well. Unfortunately, as a result of the discrete value of the real capacitors (E12 or E24
series), the resonant frequency usually does not fall exactly into the critical harmonic frequency. For example, with the next available
value (2.2 pF), the resonance would already shift significantly below the second harmonic frequency. Note that, in the setup of
Figure
4.1 Effect of a Shunt SMD Capacitor Self-Resonating Close to the Second Harmonic on page 28
part a., the capacitor is connected to
the ground through a via hole, which introduces an additional series parallel inductance and, therefore, detunes the C0 self-resonance
to a lower frequency. Therefore, the via properties, such as diameter, dielectric thickness, etc., and the trace variation between the via
and the C0 capacitor give some limited flexibility to tune down the resonant frequency if it is required.
Unfortunately, because of the shunt effect of the C0, the application of the parallel C0 capacitor causes the insertion loss at the funda-
mental frequency to become unacceptably high (~3 dB), which is a critical issue. To avoid this issue, an inductor (denoted by L0), paral-
lel with the C0 capacitor, is introduced as shown in
Figure 4.2 Effect of a Shunt Cap Self-Resonating at the Second Harmonic Together
with a Parallel SMD Inductor Resonating with the Shunt Cap at the Fundamental on page 29
part a. Note that the C1 capacitor is still
disabled in this simulation. The formed L0-C0 parallel resonator is tuned to resonate and show high impedance around the fundamental
frequency; in other words, to be practically invisible. As a result, the introduction of L0 drastically reduces the insertion loss from ~3 dB
to ~0.5 dB at the fundamental, as shown by the leftmost marker in
Figure 4.2 Effect of a Shunt Cap Self-Resonating at the Second
Harmonic Together with a Parallel SMD Inductor Resonating with the Shunt Cap at the Fundamental on page 29
part b. In this simu-
lation, the S-parameter file of a low-cost multilayer type (LQG series from Murata) 1.2 nH SMD inductor is used.
AN930: EFR32 2.4 GHz Matching Guide
Transmission Line (Tline) Match for Minimal BOM Solutions (U.S. Patent US9780757B1)
silabs.com
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