S i 1 0 x x - D K
18
Rev. 0.1
10.6. Expansion I/O Connector (P1)
The 96-pin Expansion I/O connector P1 provides access to all signal pins of the Si10xx device (except the C2
debug interface signals). In addition, power supply and ground pins are included. A small through-hole prototyping
area is also provided. See Table 2 for a list of pin descriptions for P1.
Table 2. P1 Pin Descriptions
Row A
Pin #
Description
Row B
Pin #
Description
Row C
Pin #
Description
1
+3 VD
1
GND
1
nc
2
nc
2
nc
2
nc
3
nc
3
nc
3
nc
4
nc
4
nc
4
nc
5
nc
5
nc
5
nc
6
nc
6
nc
6
nc
7
nc
7
nc
7
nc
8
nc
8
nc
8
nc
9
GPIO_2
9
GPIO_1
9
GPIO_0
10
nc
10
P0.1/AGND
10
P0.6/CNVSTR
11
P0.5/RX
11
P0.4/TX
11
P0.3H
12
P0.2H
12
P0.7/IREF0
12
P0.0/VREF
13
P2.1
13
nc
13
nc
14
CLK
14
NSS/PWR
14
MOSI
15
MISO/SCL
15
SCK/SDA
15
nc
16
nc
16
nc
16
nc
17
nc
17
nc
17
nc
18
nc
18
nc
18
nc
19
nc
19
nc
19
nc
20
nc
20
nc
20
nc
21
nc
21
nc
21
nc
22
nc
22
nc
22
nc
23
nc
23
nc
23
nc
24
nc
24
nc
24
nc
25
nc
25
GND
25
nc
26
GND
26
nc
26
nc
27
nc
27
nc
27
nc
28
nc
28
VDD/DC+
28
VBAT
29
nc
29
nc
29
nc
30
nc
30
nc
30
nc
31
nc
31
nc
31
nc
32
nc
32
GND
32
nc
Summary of Contents for Si1000
Page 11: ...Si10xx DK Rev 0 1 11 Figure 7 Port I O Usage Matrix ...
Page 21: ...S i 10xx DK Rev 0 1 21 11 Schematics Figure 11 Si1000 Motherboard Schematic 1 of 3 ...
Page 22: ...Si 10xx DK 22 Rev 0 1 Figure 12 Si1000 Motherboard Schematic 2 of 3 ...
Page 23: ...S i 10xx DK Rev 0 1 23 Figure 13 Si1000 Motherboard Schematic 3 of 3 ...
Page 25: ...Si10xx DK Rev 0 1 25 NOTES ...
Page 27: ......