Si5324
Preliminary Rev. 0.3
51
Reset value = 0000 0000
Reset value = 0000 0000
Reset value = 0001 0011
Register 142.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
INDEPENDENTSKEW1 [7:0]
Type
R/W
Bit
Name
Function
7:0
INDEPENDENTSKEW1 [7:0]
INDEPENDENTSKEW1.
8 bit field that represents a twos complement of the phase offset in
terms of clocks from the high speed output divider. Default = 0.
Register 143.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
INDEPENDENTSKEW2 [7:0]
Type
R/W
Bit
Name
Function
7:0
INDEPENDENTSKEW2 [7:0]
INDEPENDENTSKEW2.
8 bit field that represents a twos complement of the phase offset in terms
of clocks from the high speed output divider. Default = 0.
Register 185.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
NVM_REVID [7:0]
Type
R
Bit
Name
Function
7:0
NVM_REVID [7:0]
NVM_REVID.