(5-5-3. DT-04/-05 Board)
The 7MHz clock pulses, which have been gated by the trigger
generator, are
this
model,2H
interval clock pulses (3H interval clock pulses in the
'-'V,"-i-J.J.I.'-'~,
and
time base of the horizontal
sync signal
during
arbitrary
measured.
results
measurement
are
added to the output (~¢)
of the V sync
detector, which
will be described later, and the jump signal is produced. The
7MHz clock
IS
nrooucec
frequency. Consequently,
the two horizontal
sync (3 horizontal
sync
at
(192 J-lsec with the PS model).
This means that the H sync interval counter counts 910 (1377
with the PAL/SECAM
but,
fact,
7 MHz
clock pulses entering the counter stop in a time equivalent to 2
clock
and so
PAL/SECAM
model) instead.
SYNC
NTERVAL
COUNTER
EX. TAPE SPEED=lX
NORMAL
LOAD
IC2B- 12
COUNT PULSE
IC5D-13
BRW10UT
IC3A-12
The interval counter is preset to a count of 940 (1407 in the
it
is loaded with the load pulses from the trigger pulse generator,
it
With a lx normal speed, the counter data output is latched to
the load pulses from the trigger pulse generator at the
32 count
it is
loaded
the
value.
load
from that with Ix normal speed and so the value of the counter's
is incremented
or decremented,
and the count is
changed from 14to 49 (10to 52 in the PS model) across
-Ix to
+
3x speed range.
LATCH
4.
Interval
is a protectron
data latched by the H sync interval counter are normal.
H sync interval counter in the
stage is loaded every
2H (every 3H with the PS model) and its data are latched into
IC lC. The data, prior to being latched
again into IC IC, are
The
"",t'Y"I
r\c:.rc:.f'r\Y"
the high -order 4 bits among the 6-bit data latched into IC IC
BO,
1,
the A =B output is set high when these two sets of data tally.
When the "A=B" pin of comparator
IC2C-6 is kept high for 3
intervals in
the
to be
IC2B-8 is set low, and the data are latched into IC ID as the "Af"
BVH-2000(U/C)/PS/PM
BVH-2180(U/C)/PS/PM
5-5-9
DYNAMIC
TRACKING
SYSTEM
z
o
~
«
0:
w
CL
o
LL
o
>-
0:
o
W
I
I-
Summary of Contents for BVH-2000
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