2-90
BVW-55
IC
64
63
62
61
60
59
58
57
56
55
54
53
52
V
DD
NC
20
21
22
23
24
25
26
27
28
29
30
31
32
GND
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
PIN
No.
I/O
SIGNAL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P41
P40
P53
P52
P51
P50
RESET
X2
X1
P63
P62
P61
P60
P73
P72
P71
PIN
No.
I/O
SIGNAL
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
I
I
I
I
I
I
P70
P83
P82
P81
P80
P93
P92
P91
P90
GND
P13/INT3
P12/INT2
P11/INT1
P10/INT0
PTH03
PTH02
PIN
No.
I/O
SIGNAL
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
I
I
I
I
I/O
I/O
I/O
I/O
I
I/O
I/O
I
I/O
I/O
I/O
I/O
PTH01
PTH00
T10
T11
P23
P22/PCL
P21/PTO1
P20/PTO0
P03/SI
P02/SO
P01/
SCK
P00/INT4
P123
P122
P121
P120
PIN
No.
I/O
SIGNAL
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
I/O
P133
P132
P131
P130
P143
P142
P141
P140
NC
V
DD
P33
P32
P31
P30
P43
P42
—TOP VIEW—
C-MOS 4-BIT SINGLE CHIP MICROCOMPUTER
44
43
42
41
30
29
28
27
40
39
38
37
62
61
60
59
2
1
64
63
34
33
32
31
35
36
7
9
8
P00/INT4
P01/
SCK
P02/SO
P03/SI
P10/INT0
P11/INT1
P12/INT2
P13/INT3
P20/PTO0
P21/PTO1
P22/PCL
P23
P30
P31
P32
P33
P40
P41
P42
P43
PTH00
PTH01
PTH02
PTH03
T10
T11
RESET
X1
X2
6
5
4
3
13
12
11
10
17
16
15
14
21
20
19
18
25
24
23
22
48
47
46
45
52
51
50
49
56
55
54
53
P50
P51
P52
P53
P60
P61
P62
P63
P70
P71
P72
P73
P80
P81
P82
P83
P90
P91
P92
P93
P120
P121
P122
P123
P130
P131
P132
P133
P140
P141
P142
P143
INPUT
INT0 - INT4
P00 - P03
P10 - P13
PTH00 - PTH03
RESET
SI
TI0
TI1
X1, X2
OUTPUT
PCL
PTO0
PTO1
SO
INPUT/OUTPUT
P20 - P23
P30 - P33
P40 - P43
P50 - P53
P60 - P63
P70 - P73
P80 - P83
P90 - P93
P120 - P123
P130 - P133
P140 - P143
SCK
: INTERRUPT
: 4-BIT PORT (PORT0)
: 4-BIT PORT (PORT1)
: THRESHOLD 4-BIT PROGRAMABLE
ANALOG PORT
: SYSTEM RESET
: SERIAL INTERFACE DATA
: TIMER/EVENT COUNTER CLOCK (CH-0)
: TIMER/EVENT COUNTER CLOCK (CH-1)
: CRYSTAL OSCILLATOR
: PROGRAMABLE CLOCK
: TIMER/EVENT COUNTER (CH-1)
: TIMER/EVENT COUNTER (CH-2)
: SERIAL INTERFACE DATA
: 4-BIT PORT (PORT2)
: PROGRAMMABLE 4-BIT PORT (PORT3)
: 4-BIT PORT (PORT4)
: 4-BIT PORT (PORT5)
: PROGRAMMABLE 4-BIT PORT (PORT6)
: 4-BIT PORT (PORT7)
: 4-BIT PORT (PORT8)
: 4-BIT PORT (PORT9)
: 4-BIT PORT (PORT12)
: 4-BIT PORT (PORT13)
: 4-BIT PORT (PORT14)
: SERIAL INTERFACE CLOCK
BASIC
INTERVAL
TIMER
TIMER/EVENT
COUNTER
#0
35
40
T10
PTO0/P20
INTBT
INTT0
INTT1
INTS10
TIMER/EVENT
COUNTER
#1
36
39
T11
PTO1/P21
SERIAL
INTERFACE
41
42
43
S1/P03
S0/P02
SCK
/P01
INTERRUPT
CONTROL
30
29
28
27
44
INT0/P10
INT1/P11
INT2/P12
INT3/P13
INT4/P00
PROGRAMMABLE
THRESHOLD
PORT #0
34 - 31
PTH00 - PTH03
4
BIT SEQ.
BUFFER (16)
PORT0
4
44 - 41
P00 - P03
PORT1
4
30 - 27
P10 - P13
PORT2
4
40 - 37
P20 - P23
PORT3
4
62 - 59
P30 - P33
PORT4
4
2, 1, 64, 63
P40 - P43
PORT5
4
6 - 3
P50 - P53
PORT6
4
13 - 10
P60 - P63
PORT7
4
17 - 14
P70 - P73
PORT8
4
21 - 18
P80 - P83
PORT9
4
25 - 22
P90 - P93
PORT12
4
48 - 45
P120 - P123
PORT13
4
52 - 49
P130 - P133
PORT14
4
56 - 53
P140 - P143
PROGRAM
COUNTER
ROM
PROGRAM
MEMORY
4 K-16 K BYTES
DECODE
AND
CONTROL
GENERAL REG.
RAM
DATA MEMORY
320/512
x
4 BITS
ALU
CY
SP (8)
BANK
CLOCK
OUTPUT
CONTROL
CLOCK
DIVIDER
CLOCK
GENERATOR
STAND BY
CONTROL
Fx/2
N
CPU CLOCK
Ø
38
PCL/P22
8
X2
9
X1
58
V
DD
26
V
SS
7
RESET
UPD75106GF-J20-3BE (NEC)
Summary of Contents for BVW-55
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Page 50: ...1 40 BVW 55 1 2 3 4 5 6 7 8 9 d l s d l 1 15 Fixtures and Adjustment Equipment List ...
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Page 169: ...1 9 BVW 55 P2 1 2 Fixtures and Adjustment Equipment List 1 2 3 4 5 6 7 8 9 d l s d l ...
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Page 396: ...1 2 BVW 55 ...
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Page 909: ...5 27 b BVW 55 5 27 b CN101 CN301 CN302 CN303 CN901 MB 838 B SIDE SUFFIX 12 MB 838 MB 838 ...
Page 911: ...5 27 a BVW 55 5 27 a CN101 CN301 CN302 CN303 CN901 MB 838 B SIDE SUFFIX 11 MB 838 MB 838 ...
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