— 39 —
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
I/O
—
I
I
I
I
I
O
I
I
O
O
O
O
O
O
O
O
—
I/O
I/O
I/O
I/O
I
I/O
O
I
O
—
O
O
O
O
O
O
—
I
I
I
I
I
Description
Digital power supply
System reset “L” : reset
Muting input “H” : mute
Serial data input, supplied from CPU
Latch input, supplied from CPU
Serial data transfer clock input, supplied from CPU
SENS signal output to CPU
SENS serial data read-out clock input
Input pin for anti-shock (Connected to GND)
WFCK output (Not used)
Not used
Not used
Not used
Not used
Sub-code sync output
4.2336 MHz output (Not used)
Word clock output (f=2fs)
Digital GND
Numbers of track counted signal input/output (Not used)
Mirror signal input/output
Defect signal input/output
Focus OK input/output
Spindle motor external control input (Connected to GND)
GFS is sampled by 460 Hz. H when GFS is H (Not used)
Output to control spindle motor servo
Input signal to detect disc inner most track
2/3 divider output of pin 71
Digital power supply
Sled drive output
Sled drive output
Tracking drive output
Tracking drive output
Focus drive output
Focus drive output
Digital GND
TEST pin connected normally to GND
TEST pin connected normally to GND
Center voltage input pin
Focus error signal input
Sled error signal input
Pin Name
DVDD
XRST
MUTE
DATA
XLAT
CLOK
SENS
SCLK
ATSK
WFCK
XUGF
XPCK
GFS
C2PO
SCOR
CM4
WDCK
DVSS
COUT
MIRR
DFCT
FOK
PWMI
LOCK
MDP
SSTP
FSTO
DVDD1
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
DVSS1
TEST
TES1
VC
FE
SE
• IC 101 DIGITAL SIGNAL PROCESSOR (CXD2585Q)
• Abbreviation
GFS : Guarded Frame Sync
6-15. IC PIN FUNCTION DESCRIPTION