DEV-30/50/50V_L3
6-15
Note: IC1601 is not supplied, but this is included in
VC-1016 COMPLETE BOARD (SERVICE).
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
A
B
C
D
E
F
08
VC-1016 BOARD (7/21)
CPU (SUB), CAMERA DSP, AV SIGNAL PROCESS,
LENS CONTROL, MODE CONTROL, HDMI PROCESS (3/3)
XX MARK: NO MOUNT
FSP_AD_12_S
REG_GND
C1827
0.1u
C1804
0.1u
REG_GND
C1824
4.7u
A_VID_1.1V_S
FSP_AD_0_S
FSP_AD_1_S
FSP_XCS_2_S
C1808
22u
D_VID_1.1V_S
C1805
0.1u
C1807
0.1u
REG_GND
REG_GND
FSP_AD_2_S
D_1.8V_IC_1601
FSP_AD_5_S
FSP_AD_9_S
FSP_AD_11_S
REG_GND
C1828
XX
C1821
0.1u
FSP_AD_14_S
D_1.8V_IC_1601
C1810
0.1u
REG_GND
R1814
XX
REG_GND
C1809
22u
C1826
0.1u
HB_1.2V
C1811
10u
C1816
0.1u
REG_GND
FSP_AD_13_S
C1830
XX
FSP_XOE_S
C1822
XX
C1806
22u
REG_GND
HB_1.8V
C1819
0.001u
D_1.2V
FSP_XADV_S
FB1801
FSP_AD_6_S
FSP_AD_4_S
C1814
0.1u
FSP_AD_15_S
FSP_AD_8_S
C1817
XX
C1812
0.1u
FSP_AD_3_S
C1815
0.1u
HB_1.2V
R1815
240
REG_GND
C1823
0.1u
C1829
0.1u
C1813
0.001u
FSP_AD_10_S
FSP_AD_7_S
C1803
XX
FSP_XWE_S
LN1801
D_VID_1.1V_S
C1818
0.0022u
R1805
XX
IC1601 (5/6)
AVY2G2G05EINZ
CPU (SUB), CAMERA DSP, AV SIGNAL PROCESS,
LENS CONTROL, MODE CONTROL, HDMI PROCESS
A28
VDD_CORE
A29
VDD_CORE
B28
VDD_CORE
B29
VDD_CORE
B30
VDD_CORE
C28
VDD_CORE
C29
VDD_CORE
C30
VDD_CORE
D29
VDD_CORE
F26
VDD_CORE
G25 VDD_CORE
G26 VDD_CORE
H24
VDD_CORE
H25
VDD_CORE
H26
VDD_CORE
J24
VDD_CORE
J25
VDD_CORE
J26
VDD_CORE
K24
VDD_CORE
K25
VDD_CORE
L22
VDD_CORE
M21 VDD_CORE
N21
VDD_CORE
N22
VDD_CORE
P21
VDD_CORE
P22
VDD_CORE
K22
VDD_CORE
L21
VDD_CORE
N10
IOVDD11_DDR
P10
IOVDD11_DDR
R10
IOVDD11_DDR
T10
IOVDD11_DDR
U10
IOVDD11_DDR
V10
IOVDD11_DDR
N1
VDD12_POP_DDR
N2
VDD12_POP_DDR
AC1 VDD12_POP_DDR
AC2 VDD12_POP_DDR
AK8 VDD12_POP_DDR
AL8
VDD12_POP_DDR
F31
VDD12_POP_DDR
A12
VDD12_POP_DDR
B12
VDD12_POP_DDR
A17
VDD12_POP_DDR
B17
VDD12_POP_DDR
AH30 IOVDD_FSP
AH31 IOVDD_FSP
AG29 VSS
AJ26 VSS
AJ27 VSS
AK27 VSS
AL27 VSS
T1
IOVDDCA_DDR
T2
IOVDDCA_DDR
T3
IOVDDCA_DDR
T6
IOVDDCA_DDR
T7
IOVDDCA_DDR
T8
IOVDDCA_DDR
K1
IOVDDQ_DDR1
K2
IOVDDQ_DDR1
K3
IOVDDQ_DDR1
K6
IOVDDQ_DDR1
K7
IOVDDQ_DDR1
K8
IOVDDQ_DDR1
AA1
IOVDDQ_DDR2
AA2
IOVDDQ_DDR2
AA3
IOVDDQ_DDR2
AA6
IOVDDQ_DDR2
AA7
IOVDDQ_DDR2
AA8
IOVDDQ_DDR2
R1
DDRVREF_DQ
R2
VSS
E31
DDRVREF_CA
E29
VSS
F1
VDD18_POP_DDR
F2
VDD18_POP_DDR
F30
VDD18_POP_DDR
AK20
VDD18_POP_NAND
AL20
VDD18_POP_NAND
AG30
VDD18_POP_NAND
AG31
VDD18_POP_NAND
AA24
FSP_ADDR__20
AA25
FSP_ADDR__19
AA26
FSP_ADDR__18
AB24
FSP_ADDR__17
AB25
FSP_ADDR__16
AB26
FSP_AD__15
AC24
FSP_AD__14
AC25
FSP_AD__13
AC26
FSP_AD__12
AD22
FSP_AD__11
AD23
FSP_AD__10
AD24
FSP_AD__9
AD25
FSP_AD__8
AD26
FSP_AD__7
AE23
FSP_AD__6
AE24
FSP_AD__5
AA21
FSP_AD__4
AA22
FSP_AD__3
AA20
FSP_AD__2
AB20
FSP_AD__1
AB21
FSP_AD__0
AB22
FSP_XOE
AH29
FSP_XWE
AJ30
FSP_XCS__2
AJ31
FSP_XCS__1
AJ29
FSP_XCS__0_OUT
AJ28
FSP_XCS__0_IN
AF24
FSP_XADV
AL29
FSP_CLK_OUT_FLASH0
AL28
FSP_CLK_IN_FLASH0
AK30
FSP_RDY0
AK29
FSP_XRST_OUT
AK28
FSP_XRST_IN
M22 VDD_CORE
AF23
FSP_INT
C1
VSS
D1
VSS
D2
VSS
E1
VSS
E2
VSS
E3
VSS
H6
VSS
J3
VSS
J6
VSS
J7
VSS
J8
VSS
L2
VSS
L3
VSS
L6
VSS
L7
VSS
L8
VSS
M7
VSS
M8
VSS
AB2
VSS
AB3
VSS
AB6
VSS
AB7
VSS
AB8
VSS
AC3
VSS
AD3
VSS
G13
VSS
H13
VSS
M10
VSS
M11
VSS
M12
VSS
M13
VSS
M14
VSS
M15
VSS
M16
VSS
M17
VSS
M18
VSS
M19
VSS
M20
VSS
N11
VSS
N12
VSS
N13
VSS
N14
VSS
N15
VSS
N16
VSS
N17
VSS
N18
VSS
N19
VSS
N20
VSS
P11
VSS
P12
VSS
P13
VSS
P14
VSS
P15
VSS
P16
VSS
P17
VSS
P18
VSS
P19
VSS
P20
VSS
R11
VSS
R12
VSS
R13
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
R18
VSS
R19
VSS
R20
VSS
R21
VSS
R22
VSS
H29
VSS
A27
VSS
B27
VSS
C27
VSS
F29
DDR_ZQ
A1
N.C.
A2
N.C.
B1
N.C.
AK1
N.C.
AL1
N.C.
AL2
N.C.
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
T18
VSS
T19
VSS
T20
VSS
T21
VSS
T22
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
U18
VSS
U19
VSS
U20
VSS
U21
VSS
U22
VSS
V11
VSS
V12
VSS
V13
VSS
V14
VSS
V15
VSS
V16
VSS
V17
VSS
V18
VSS
V19
VSS
V20
VSS
V21
VSS
V22
VSS
W10
VSS
W11
VSS
W12
VSS
W13
VSS
W14
VSS
W15
VSS
W16
VSS
W17
VSS
W18
VSS
W19
VSS
W20
VSS
W21
VSS
W22
VSS
Y11
VSS
Y12
VSS
Y13
VSS
Y14
VSS
Y15
VSS
Y16
VSS
Y17
VSS
Y18
VSS
Y19
VSS
Y20
VSS
Y21
VSS
Y22
VSS
AA12
VSS
AA18
VSS
AA19
VSS
AB19
VSS
AE14
VSS
AE15
VSS
AF22
VSS
W24
VSS
Y24
VSS
Y25
VSS
F25
VSS
G24
VSS
H23
VSS
AE22
VPGM
AL30
N.C.
AL31
N.C.
AK31
N.C.
A30
N.C.
A31
N.C.
B31
N.C.
C1801
22u
C1802
XX
C1825
XX
R1816
XX
COM181
COM182
COM183
FSP
GND
IC1601 (6/6)
AVY2G2G05EINZ
CPU (SUB), CAMERA DSP, AV SIGNAL PROCESS,
LENS CONTROL, MODE CONTROL, HDMI PROCESS