—
20
—
SA
T-W
60
+ 3 _ 3 V
+ 3 _ 3 V
+ 3 _ 3 V
+ 3 _ 3 V
6 0 3
5 %
4.7K
R 0 3 0 4
6 0 3
5 %
4.7K
R 0 3 0 5
6 0 3
5 %
4.7K
R 0 3 0 6
6 0 3
5 %
4.7K
R 0 3 0 7
6 0 3
5 %
4.7K
R 0 3 1 7
6 0 3
5 %
4.7K
R 0 3 1 8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
VCC_CORE
BIGENDIAN
V S S P
M A S T E R C L O C K
M O D E I N
V C C P
S Y S _ A D < 2 0 >
S Y S _ A D < 2 1 >
S Y S _ A D < 2 2 >
S Y S _ A D < 2 3 >
S Y S _ A D < 2 4 >
S Y S _ A D < 2 5 >
S Y S _ A D < 2 6 >
S Y S _ A D < 1 9 >
S Y S _ A D < 1 8 >
S Y S _ A D < 1 7 >
S Y S _ A D < 2 7 >
S Y S _ A D < 2 8 >
S Y S _ A D < 2 9 >
S Y S _ A D < 3 1 >
S Y S _ A D < 3 0 >
S Y S _ A D < 1 6 >
S Y S _ A D C < 2 >
S Y S _ A D C < 3 >
S Y S _ A D < 0 >
S Y S _ A D < 1 >
S Y S _ A D < 2 >
S Y S _ A D < 3 >
S Y S _ A D < 4 >
S Y S _ A D < 5 >
S Y S _ A D < 6 >
S Y S _ A D < 9 >
S Y S _ A D < 1 0 >
S Y S _ A D < 1 1 >
S Y S _ A D < 1 2 >
S Y S _ A D < 1 3 >
S Y S _ A D < 1 4 >
S Y S _ A D < 1 5 >
S Y S _ A D < 8 >
S Y S _ A D < 7 >
S Y S _ A D C < 1 >
S Y S _ C M D P
S Y S _ C M D < 0 >
S Y S _ C M D < 2 >
S Y S _ C M D < 3 >
S Y S _ C M D < 4 >
S Y S _ C M D < 5 >
S Y S _ C M D < 1 >
S Y S _ A D C < 0 >
S Y S _ C M D < 8 >
S Y S _ C M D < 7 >
S Y S _ C M D < 6 >
C O L D R E S E T _ N
R E S E T _ N
R E L E A S E _ N
VALIDOUT_N
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N C _ P I N < 5 >
N C _ P I N < 4 >
N C _ P I N < 3 >
N C _ P I N < 1 >
N C _ P I N < 2 >
N C _ P I N < 0 >
N C _ P I N < 6 >
N C _ P I N < 7 >
N C _ P I N < 8 >
N C _ P I N < 9 >
N C _ P I N < 1 0 >
N C _ P I N < 1 1 >
R D R D Y _ N
W R R D Y _ N
E X T R Q S T _ N
VALIDIN_N
NMI_N
I N T _ N < 0 >
INT_N<1>
I N T _ N < 2 >
I N T _ N < 3 >
I N T _ N < 4 >
I N T _ N < 5 >
M O D E C L O C K
JTMS
JTCK
JTDI
JTDO
BUS INTERFACE
JTAG
INTERRUPTS
P O W E R & G R O U N D
V C C O K
R M 5 2 3 1
Q F P
U 0 3 0 1
6 0 3
5 %
4.7K
R0311
6 0 3
5 %
4.7K
R 0 3 1 2
6 0 3
5 %
4.7K
R 0 3 0 1
6 0 3
5 %
4.7K
R 0 3 1 0
1210
C E R M
10V
2 0 %
1 0 U F
C 0 3 0 6
R 0 3 0 3
5 %
6 0 3
4.7
R 0 3 0 2
5 %
6 0 3
4.7
+ 2 _ 5 V
+ 3 _ 3 V
6 0 3
TK
1/16W
5 %
1 0 K
R 0 3 0 8
+ 3 _ 3 V
+ 3 _ 3 V
+ 3 _ 3 V
+ 3 _ 3 V
+ 3 _ 3 V
+ 3 _ 3 V
6 0 3
5 %
4.7K
R 0 3 1 9
6 0 3
5 %
4.7K
R 0 3 2 1
6 0 3
5 %
4.7K
R 0 3 2 0
6 0 3
5 %
4.7K
R 0 3 1 6
6 0 3
5 %
4.7K
R 0 3 1 3
6 0 3
5 %
4.7K
R 0 3 1 4
6 0 3
5 %
4.7K
R 0 3 1 5
8 0 5
C E R M
5 0 V
2 0 %
1.5NF
C 0 3 0 7
8 0 5
C E R M
5 0 V
2 0 %
0.1UF
C 0 3 0 5
D R A W I N G
LAST_MODIFIED=Tue Mar 21 17:56:15 2000
C WEBTV NETWORKS, INC. 1999
representative of a named recipient.
or otherwise use this document unless you are an authorized
than the recipient is not authorized. You may not read, copy,
information. Disclosure of this information to anyone other
This document contains privileged or otherwise legally protected
APPROVED:
BLOCK:
SET:
ENGINEER:
of
SET
B L O C K
REVISION:
PAGE:
of
REVISION:
PAGE:
D
C
B
A
1
2
3
4
D
5
6
7
8
C
B
A
1
2
3
4
5
6
7
8
DATE:
1
2
3 7
6
PVT
E L M E R
C P U
SLEATOR/FULLER
0.0
INT<5> IS RESERVED
FOR TIMER
C P U _ C M D < 1 > \ I
C P U _ C M D < 3 > \ I
C P U _ C M D < 0 > \ I
C P U _ C M D < 5 > \ I
C P U _ C M D < 6 > \ I
C P U _ C M D < 7 > \ I
CPU_RELEASE_N\I
CPU_VALIDOUT_N\I
C P U _ M O D E C L K \ I
C P U _ C M D < 8 > \ I
CPU_AD<31..0>\I
CPU_AD<31..0>\I
C P U _ C M D < 2 > \ I
C P U _ C M D < 4 > \ I
CPU_CMD<8..0>\I
S Y S _ A D C < 0 >
S Y S _ A D C < 1 >
S Y S _ A D C < 2 >
S Y S _ A D C < 3 >
CPU_CLK\I
CPU_CLK\I
CPU_CRESET_N\I
CPU_CRESET_N\I
CPU_SRESET_N\I
CPU_SRESET_N\I
P O W E R _ O K \ I
CPU_VCCOK\I
CPU_INT_N\I
DIAG_INT_N\I
CPU_VALIDIN_N\I
C P U _ W R R D Y _ N \ I
C P U _ V S S P
C P U _ V C C P
CPU_MODEIN\I
TITLE=BLK_CPU
A B B R E V = B C P U
2 4
2 5
6
0
1
2
3
2 6
4
5
2 7
2 8
2 9
3 0
31
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
3
2
1
70
68
66
64
63
62
61
60
59
30
29
28
31
41
27
33
128
127
126
125
100
99
98
97
96
95
2
1
65
34
38
67
108
107
104
103
92
91
88
87
86
85
82
81
78
77
76
73
24
21
20
19
16
15
12
11
10
9
6
5
122
121
118
117
112
109
116
115
55
54
53
51
50
47
46
45
44
56
36
37
123
113
101
93
83
71
48
32
25
13
3
69
39
119
110
105
89
79
74
57
42
22
17
7
124
120
114
111
106
102
94
90
84
80
75
72
58
52
49
43
26
23
18
14
8
4
40
35
16
17
18
19
2 0
FUD_INT_N\I
8
7
CPU_EXTRQST_N\I
21
2 2
2 3
Summary of Contents for DIRECTV RECEIVER SAT-W60
Page 52: ... 52 SAT W60 POWER SUPPLY ...
Page 59: ...SAT W60 ...