56
DVP-NW50
Pin No.
Pin Name
I/O
Description
1
GP0[4]
—
Not used
2
GP0[6]
—
Not used
3
CVDD
—
Power supply +1.25V
4
GP0[5]
—
Not used
5
GP0[7]
—
Not used
6
DVDD
—
Power supply +3.3V
7
VSS
—
Ground terminal
8
CVDD
—
Power supply +1.25V
9
AHCLKX0
I/O
McASP0 transmit high-frequency master clock (not used)
10
CVDD
—
Power supply +1.25V
11
VSS
—
Ground terminal
12
ACLKX0
I/O
McASP0 transmit bit clock (not used)
13
ACLKR0
I/O
McASP0 receive bit clock (not used)
14
AXR0[1]
I/O
McASP0 TX/RX data (not used)
15
AFSX0
I/O
McASP0 transmit frame sync (not used)
16
AFSR0
I/O
McASP0 receive frame sync (not used)
17
DVDD
—
Power supply +3.3V
18
AXR0[0]
I/O
McASP0 TX/RX data (not used)
19
VSS
—
Ground terminal
20
FSX1
I
Serial SPI clock signal input
21
DX1
O
Serial SPI data signal output
22
CLKX1
I
Serial SPI select signal input
23
VSS
—
Ground terminal
24
CVDD
—
Power supply +1.25V
25
DR1
I
Serial SPI data signal input
26
VSS
—
Ground terminal
27
CVDD
—
Power supply +1.25V
28
CVDD
—
Power supply +1.25V
29
DVDD
—
Power supply +3.3V
30
VSS
—
Ground terminal
31
CVDD
—
Power supply +1.25V
32
DVDD
—
Power supply +3.3V
33
VSS
—
Ground terminal
34
VSS
—
Ground terminal
35
CVDD
—
Power supply +1.25V
36
VSS
—
Ground terminal
37
CVDD
—
Power supply +1.25V
38
VSS
—
Ground terminal
39
RSV
—
Not used
40
RSV
—
Not used
41
RSV
—
Not used
42
RSV
—
Not used
43
RSV
—
Not used
44
RSV
—
Not used
45
CVDD
—
Power supply +1.25V
46
RSV
—
Not used
47
DVDD
—
Power supply +3.3V
48
VSS
—
Ground terminal
DVD AMP BOARD U301 DA605A004BRFP200 (DIGITAL SIGNAL PROCESSOR)