6-5
(7-6) Connection from ARP (IC806) to 64020
ROM data
→
ARP (IC806)
→
Decrypt (IC811)
→
AV Decoder
(IC203)
Error 04: Data read error
05: Write/read data mismatch error
06: DMA transfer DREQ error
07: DMA transfer address error
10: Chip-to-chip data transfer error
AC-3 audio data stored in ROM (IC803) are written to the ARP
(IC806), then whether they are transferred to the AV Decoder
(IC203) is checked. If transfer error is not detected, the address of
AV Decoder (IC203) to which data are transferred is displayed on
the terminal.
A part of data transferred to the AV Decoder (IC203) is read into
Syscon RAM (IC802) through DMA, and compared with ROM
(IC803) data.
(7-7) Interrupt Line in 64020
AV Decoder DRAM (IC201, 202)
→
(DMA COPY) AV Decoder
DRAM (IC201, 202) another area
Error 31: AV Decoder interruption is not detected
Data transfer stop interruption which is generated through
DMA copy of DRAM (IC201, 202) data in AV Decoder (IC203)
to another area is detected.
(8) Video Consumption Concerned
(8-2) 1914 (Serial)
Color bar output (color bar enable command) from Video Encoder
(IC252)
Error 11: Serial transfer error
Using the Vsync interruption, serial communication to the Video
Encoder (IC252) starts, and the color bar enable command is trans-
ferred to the 1914.
The Vsync interruption and internal serial 1 interruption are used.
If no error is found, the message is displayed to prompt for key
entry.
Check the color bar output.
(8-3) 1914 Read
ID read
→
Existing data matching check
Error 40: 1914 ID error
The 1914 device ID is read.
Error if the read value is not “1914 (hex)”.
(8-4) 1914 Vsync
CPU measures the 1914 Vsync interrupt cycle.
Error 41: Vsync interruption is not detected
42: Vsync interrupt cycle error
The number of interruption for 200 msec is counted, and if it is 11
to 13 times, this check is OK. It should be 12 times exactly, but ±1
errors are allowable.
(8-5) Still Picture Output (SDRAM (IC201, 202) direct write)
Pattern data
→
AV Decoder (IC203)
→
Video Out
Error 31: AV Decoder (IC203) interruption (DMA transfer) is
not detected
The pattern is directly written to the SDRAM (IC201, 202) in AV
Decoder (IC203), then its picture display is checked.
First, the brightness signal data are written by the amount of one
screen while changing every pixel.
For the color difference signals, both Cr and Cb are set to 80h for
monochromic pictures, and the display is turned on.
Then, color difference signal data are written while changing the
data every column.
As both brightness signal data and color difference signal data
take regular patterns, the processing speed is increased through
DMA transfer of the repeated sections.
Further, in detail check the color difference signal data written to
the out of display area are copied through DAM transfer to change
display colors successively.
If no error is found, the message is displayed to prompt for key
entry.
Check the pattern output.
(8-6) Still Picture Output (via ARP (IC806))
ROM picture data
→
ARP (IC806)
→
AV Decoder (IC203)
→
Video Out
Error 10: Chip-to-chip data transfer error
ROM (IC803) data are transferred to the AV Decoder (IC203) via
ARP (IC806), and the displayed picture is checked.
If no error is found, the message is displayed to prompt for key
entry.
The output picture is same as the start-up picture.
(8-7) DNR (Serial) (IC251)
ROM picture data
→
ARP (IC806)
→
AV Decoder (IC203)
→
DNR (IC251)
→
Video Out (outline)
Error 10: Chip-to-chip data transfer error
Using special diagnostic command, the output still picture is trans-
ferred to the DNR (IC251) for checking.
If no error is found, the message is displayed to prompt for key
entry.
This checking is made only for the players with DNR.
The output picture used is same as that in (8-6) Still Picture Out-
put.
The colors will vary extremely, if DNR (IC251) is effective.
For the players without DNR (IC251), the error code 0 is returned.
Summary of Contents for DVP-S300
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