22
22
HCD-CL1/CL3
7-2. BLOCK DIAGRAMS
CD SECTION
• Signal Path
: CD
:DIGITAL OUT (OPTICAL)
OPTICAL PICK-UP
BLOCK
(A-MAX.3)
PD1
PD2
I5-10
I1-6
LD
VC
SW
VCC
+5V
GND
PD
VR
LD
DRIVE
Q101
RF AMP
DIGITAL
OUT
(OPTICAL)
IC103
VC
27
VFC
25
A
6
B
7
C
8
D
9
E
10
F
11
LD
1
PD
2
IC102
MOTOR/COIL DRIVE
CH1FO
14
CH1RO
13
12
11
17
18
M
M102
SLED
MOTOR
15
16
M
M101
SPINDLE
MOTOR
F+
F-
T+
T-
2
CH1FI
3
CH1RI
5
6
24
23
25
MDP
26
SRDR
29
SFDR
28
TRDR
31
TFDR
30
FRDR
33
FFDR
32
DIGITAL SIGNAL PROCESSOR
D/A CONVERTER
IC101
DIGITAL SERVO
60
D OUT
72
L OUT
75
R OUT
R-CH
RFAC
51
28
RFDCO
15
RFAC
16
FE
18
TE
12
SW
17
FEI
29
RFDCI
RFDC
43
FE
39
TE
41
SE
40
5
DATA
DATA
7
CLOK
CLK
6
XLAT
XLT
1
SQSO
8
SENS
27 SSTP
3
XRST
20
MUTING
MASTER CONTROL
IC401(1/3)
CD-DATA
35
9
SCLK
2
SQCK
20
SCOR
66
XTAI
67
XTAO
CD-CLK
37
XLT
42
SQ-DATA-IN
32
SENS
36
SQ-CLK
33
SCOR
19
LDON
LDON
41
XRST
XRST
43
BU PWM 1
PWM1
28
BU PWM 2
PWM2
26
BU PWM 3
PWM3
24
CH2FO
CH2RO
CH3FO
CH3RO
CH4FO
CH4RO
CH2FI
CH2RI
CH3FI
CH3RI
CH4SI
A
MAIN
SECTION
IC551
+3.3V
REG.
Q102,D101
X101
16.9344MHz
+5V
+3.3V
CD-L
IC504
3
4 11
10
1
2 13
12
5
6 9
8