52
HCD-RG444
Pin No.
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Pin Name
SBSO
EXCK
XRST
SYSM
D ATA
VSS
XLAT
CLOCK
VDD
SENS
SCLK
ATSK
WFCK
XUGF
XPCK
GFS
C2PO
SCOR
VDD
C4M
WDCK
COUT
NC
I/O
O
I
I
I
I
—
I
I
—
O
I
I/O
O
O
O
O
O
O
—
O
O
I/O
—
Description
Subcode P to W serial output
SBSO readout clock input
System reset Reset when low
Mute input Muted when high
Serial data input from CPU
Internal digital ground
Latch input from CPU The serial data is latched at the falling edge
Serial data transfer clock input from CPU
Internal digital power supply
SENS output to CPU
SENS serial data readout clock input
Anti-shock input/output
WFCK output (Not used)
XUGF output (Not used)
XPCK output (Not used)
GFS output (Not used)
C2PO output (Not used)
High output when the subcode sync, S0 or S1, is detected
Internal digital power supply
4 2336MHz output (Not used)
Word clock output f = 2Fs (Not used)
Track number count signal input/output (Not used)
Not used
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QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
