62
HCD-WZ8D
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
O
—
—
O
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
Pin Name
MRAS
MCAS
MWE
GND25
VDD25
MCLK
MD0
MD1
MD2
MD3
GND25
MDQM0
VDD25
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
GND25
MDQM1
VDD25
MD12
MD13
MD14
MD15
GND
VDD
MD16
MD17
MD18
MD19
GND25
MDQM2
VDD25
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
GND25
MDQM3
VDD25
MD28
MD29
Description
SDRAM row address strobe signal output
SDRAM column address strobe signal output
SDRAM write enable signal output (“H” : read, “L” : write)
Ground terminal (SDRAM I/O signal)
Power supply terminal (+3.3V)(SDRAM I/O signal)
SDRAM Clock output
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 0 output
Power supply terminal (+3.3V)(SDRAM I/O signal)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 1 output
Power supply terminal (+3.3V)(SDRAM I/O signal)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (inside core)
Power supply terminal (+1.8V)(inside core)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 2 output
Power supply terminal (+3.3V)(SDRAM I/O signal)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 3 output
Power supply terminal (+3.3V)(SDRAM I/O signal)
SDRAM data
SDRAM data
