HCD-ZX66i/ZX99i
66
Pin No.
Pin Name
I/O
Description
55
DDVROUT
O
DC/DC converter output
56
DDVRSEN
I
DC/DC converter output voltage monitor signal input
57
AVSS5
—
Analog ground
58
DDCR
I
Reset signal input
59
NC
—
Not used. (Open)
60
BCKI
I
D/A interface bit clock signal input
61
PCMDI
I
D/A interface serial data signal input
62
LRCKI
I
D/A interface LR clock signal input
63
LRCK
O
D/A interface LR clock signal output
64
VSS
—
Ground
65
PCMD
O
D/A interface serial data signal output
66
BCK
O
D/A interface bit clock signal output
67
VDD
—
Power supply pin (+3.3 V)
68
EMPH
O
Not used. (Connect to EMPHI)
69
EMPHI
I
Not used. (Connect to EMPH)
70
IOVDD2
—
Digital power supply pin (+3.3 V)
71
DOUT
—
Digital out signal output
72, 73
TEST
I
Test pin (Normally,
fi
xed at L)
74
IOVSS2
—
Digital ground
75
NC
—
Not used. (Open)
76
XVSS
—
Ground
77
XTAO
O
Master clock signal output (16.9344 MHz)
78
XTAI
I
Master clock signal input (16.9344 MHz)
79
XVDD
—
Power supply pin (+3.3 V)
80
AVDD1
—
Analog power supply pin (+3.3 V)
81
AOUT1
O
L channel analog signal output
82
VREFL
O
L channel reference voltage output
83, 84
AVSS1,AVSS2
—
Analog ground
85
VREFR
O
R channel reference voltage output
86
AOUT2
O
R channel analog signal output
87
AVDD2
—
Analog power supply pin (+3.3 V)
88
NC
—
Not used. (Open)
89
IOVDD0
—
Digital power supply pin (+3.3 V)
90
RMUT
O
R channel “0” detection
fl
ug output (Not used in this set)
91
LMUT
O
L channel “0” detection
fl
ug output (Not used in this set)
92
NC
—
Not used. (Open)
93
XTSL
I
Sub clock signal input (Fixed at L in this set)
94
IOVSS0
—
Digital ground
95
XTACN
I
Oscillation circuit control signal input
96
SQSO
O
Sub 80 bit, PCM peak and level data signal output (Not used in this set)
97
SQCK
I
Clock signal input
98
SBSO
O
Sub P-W serial data signal output (Not used in this set)
99
EXCK
I
Clock signal input (Not used in this set)
100
XRST
I
System reset signal input
101
SYSM
I
Mute signal input (Fixed at L in this set)
102
DATA
I
Serial data signal input
103
VSS
—
Ground
104
XLAT
I
Latch signal input
105
CLOK
I
Serial data transfer clock signal input
106
VDD
—
Power supply pin (+3.3 V)
107
SENS
O
SENS signal output
108
SCLK
I
Clock signal input (Fixed at H in this set)
109
ATSK
I/O
Input/output for anti-shock (Not used in this set)
110
WFCK
O
WFCK signal output (Not used in this set)
111
XUGF
O
XUGF signal output (Not used in this set)
112
XPCK
O
XPCK signal output (Not used in this set)
