Sony ICD-UX71F - Digital Flash Voice Recorder, Service Manual

ICD-UX71/UX71F/UX81/UX81F/UX91F

26

MAIN BOARD  IC5001  LC823403B-08B-E (SYSTEM CONTROL, D/A CONVERTER)

Pin No.

Pin Name

I/O

Description

B2

TEST1

I

Test pin 1

A1

TEST2

I

Test pin 2

C2

TEST3

I

Test pin 3

B1

TEST4

I

Test pin 4

D2

TEST5

I

Test pin 5

C1

TEST6

I

Test pin 6

C3

TCK

I

JTAG test clock signal input

D3

RTCK

O

JTAG test returned clock signal output

D1

NTRST

I

JTAG test reset signal input

E2

EXA16(A15)

O

External memory address bit 16 signal output    NOR address line signal output

D4

TDI

I

JTAG test data signal input

E3

EXA15(A14)

O

External memory address bit 15 signal output    NOR address line signal output

E1

EXA14(A13)

O

External memory address bit 14 signal output    NOR address line signal output

F2

TMS

I

JTAG test mode select signal input

E4

EXA13(A12)

O

External memory address bit 13 signal output    NOR address line signal output

E5

EXA12(A11)

O

External memory address bit 12 signal output    NOR address line signal output

F3

TDO

O

JTAG test data signal output

F1

NRES

I

Reset signal input

G2

EXA11(A10)

O

External memory address bit 11 signal output    NOR address line signal output

F4

Vdd1

—

Digital power supply pin (+1.0V)

F5

EXA10(A9)

O

External memory address bit 10 signal output    NOR address line signal output

G3

Vss

—

Digital ground pin

H2

EXA9(A8)

O

External memory address bit 9 signal output    NOR address line signal output

G1

Vdd2

—

Digital power supply pin (+3.1V)

G4

EXA20(A19)

O

External memory address bit 20 signal output    NOR address line signal output

G5

NCS0

O

External memory chip select signal output 0    NOR chip select signal output

H3

EXA21(P2E)

O

External memory address bit 21 signal output    NOR address line signal output

H1

NCS1

O

External memory chip select signal output 1    Not used in this set. (Open)

J2

NWRENWRL/NWE

O

External memory write/external memory write low byte signal output

H4

NCS2(P20)

O

External memory chip select 2 signal output    LCD chip select signal output

J1

NCS3(P10)

O

External memory chip select 3 signal output    RTC chip select signal output

H5

NRESET

I

Flash reset signal input    Not used in this set. (Open)

K2

NLBEXA0

O

External memory address bit 0/external memory low byte select signal output
Not used in this set. (Open) 

K1

NHBNWRH

O

External memory write/external memory write high byte signal output
Not used in this set. (Open)

J3

PHI(P11)

O

AHB bus clock signal output (32.768kHz)    FM DX/Local change signal output

J4

EXA19(A18)

O

External memory address bit 19 signal output    NOR address line signal output

K3

EXA18(A17)

O

External memory address bit 18 signal output    NOR address line signal output

L2

EXTFIQ(P2F)

I

External FIQ interruption signal input    Not used in this set. (Open)

L1

SCK0

O

Serial interface 0 clock signal output    RTC/LCD clock signal output

K4

EXA8(A7)

O

External memory address bit 8 signal output    NOR address line signal output

J5

EXA7(A6)

O

External memory address bit 7 signal output    NOR address line signal output

M1

SDO0

O

Serial interface 0 data signal output    RTC/LCD data signal output

M2

EXA6(A5)

O

External memory address bit 6 signal output    NOR address line signal output

L3

SDI0

I

Serial interface 0 data signal input    RTC data signal input

L4

Vdd1

—

Digital power supply pin (+1.0V)

K5

EXA5(A4)

O

External memory address bit 5 signal output    NOR address line signal output

M3

Vss

—

Digital ground pin

N1

EXA4(A3)

O

External memory address bit 4 signal output    NOR address line signal output

N2

Vdd2

—

Digital power supply pin (+3.1V)

P1

EXA3(A2)

O

External memory address bit 3 signal output    NOR address line signal output

N3

EXA2(A1)

O

External memory address bit 2 signal output    NOR address line signal output